The ID registers are replacing (some of) the feature bits.
We need (some of) these values to determine the set of data
to be handled during migration.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181113180154.17903-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
cpu->kvm_target = arm_host_cpu_features.target;
cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
+ cpu->isar = arm_host_cpu_features.isar;
env->features = arm_host_cpu_features.features;
}
* by asking the host kernel)
*/
typedef struct ARMHostCPUFeatures {
+ ARMISARegisters isar;
uint64_t features;
uint32_t target;
const char *dtb_compatible;