{
unsigned int inst_len;
- if ( !nestedhvm_enabled(v->domain) ) {
+ /*
+ * STGI doesn't require SVME to be set to be used. See AMD APM vol
+ * 2 section 15.4 for details.
+ */
+ if ( !nestedhvm_enabled(v->domain) )
+ {
hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
return;
}
uint32_t general1_intercepts = vmcb_get_general1_intercepts(vmcb);
vintr_t intr;
- if ( !nestedhvm_enabled(v->domain) ) {
+ if ( !nsvm_efer_svm_enabled(v) )
+ {
hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
return;
}
{
if ( !nsvm_efer_svm_enabled(v) )
{
- gdprintk(XENLOG_ERR, "VMRUN: nestedhvm disabled, injecting #UD\n");
hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
return;
}
if ( !nsvm_efer_svm_enabled(v) )
{
- gdprintk(XENLOG_ERR, "VMLOAD: nestedhvm disabled, injecting #UD\n");
hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
return;
}
if ( !nsvm_efer_svm_enabled(v) )
{
- gdprintk(XENLOG_ERR, "VMSAVE: nestedhvm disabled, injecting #UD\n");
hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
return;
}
break;
case VMEXIT_INVLPGA:
+ if ( !nsvm_efer_svm_enabled(v) )
+ {
+ hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC);
+ break;
+ }
if ( (inst_len = __get_instruction_length(v, INSTR_INVLPGA)) == 0 )
break;
svm_invlpga_intercept(v, regs->rax, regs->ecx);