l3tab = __map_domain_page(pg);
clear_page(l3tab);
d->arch.perdomain_l3_pg = pg;
+ if ( is_idle_domain(d) )
+ idle_pg_table[l4_table_offset(PERDOMAIN_VIRT_START)] =
+ l4e_from_page(pg, __PAGE_HYPERVISOR_RW);
+
if ( !nr )
{
unmap_domain_page(l3tab);
/* Slot 260: per-domain mappings (including map cache). */
#define PERDOMAIN_VIRT_START (PML4_ADDR(260))
#define PERDOMAIN_SLOT_MBYTES (PML4_ENTRY_BYTES >> (20 + PAGETABLE_ORDER))
-#define PERDOMAIN_SLOTS 3
+#define PERDOMAIN_SLOTS 4
#define PERDOMAIN_VIRT_SLOT(s) (PERDOMAIN_VIRT_START + (s) * \
(PERDOMAIN_SLOT_MBYTES << 20))
/* Slot 261: machine-to-phys conversion table (256GB). */
#define ARG_XLAT_START(v) \
(ARG_XLAT_VIRT_START + ((v)->vcpu_id << ARG_XLAT_VA_SHIFT))
+#define PERDOMAIN_STACK_BOTTOM PERDOMAIN_VIRT_SLOT(3)
+#define PERDOMAIN_STACK_TOP PERDOMAIN_STACK_BOTTOM + STACK_SIZE
+
#define ELFSIZE 64
#define ARCH_CRASH_SAVE_VMCOREINFO