]> xenbits.xensource.com Git - xen.git/commitdiff
x86/vPMU: add missing Merom, Westmere, and Nehalem models
authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Fri, 8 Mar 2013 15:21:03 +0000 (16:21 +0100)
committerJan Beulich <jbeulich@suse.com>
Fri, 8 Mar 2013 15:21:03 +0000 (16:21 +0100)
Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere).

A comprehensive list is available at:
http://software.intel.com/en-us/articles/intel-architecture-and-processor-identification-with-cpuid-model-and-family-numbers

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Jun Nakajima <jun.nakajima@intel.com>
xen/arch/x86/hvm/vmx/vpmu_core2.c

index 4d33231dfc0b1c189b0321a37f34591b2a93cd5c..eb595cd2288d693aeaa7d74e8c15d78ad4e6c876 100644 (file)
@@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags)
     {
         switch ( cpu_model )
         {
+        /* Core2: */
         case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
+        case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
         case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
-        case 26: /* 45 nm nehalem, "Bloomfield" */
         case 29: /* six-core 45 nm xeon "Dunnington" */
+
         case 42: /* SandyBridge */
         case 45: /* SandyBridge, "Romley-EP" */
+
+        /* Nehalem: */
+        case 26: /* 45 nm nehalem, "Bloomfield" */
+        case 30: /* 45 nm nehalem, "Lynnfield", "Clarksfield", "Jasper Forest" */
         case 46: /* 45 nm nehalem-ex, "Beckton" */
-        case 47: /* 32 nm Xeon E7 */
+
+        /* Westmere: */
+        case 37: /* 32 nm nehalem, "Clarkdale", "Arrandale" */
+        case 44: /* 32 nm nehalem, "Gulftown", "Westmere-EP" */
+        case 47: /* 32 nm Westmere-EX */
+
         case 58: /* IvyBridge */
         case 62: /* IvyBridge EP */
             ret = core2_vpmu_initialise(v, vpmu_flags);