When a guest is writing a byte, the value will be located in bits[7:0]
of the register.
Although the current implementation is expecting the byte at the Nth
byte of the register where N = address & 4;
When the address is not 4-byte aligned, the corresponding byte in the
internal state will always be set to zero rather.
Note that byte access are only used for GICD_IPRIORITYR and
GICD_ITARGETSR. So the worst things that could happen is not setting the
priority correctly and ignore the target vCPU written.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
{
int byte = offset & 0x3;
- var &= (0xff << (8*byte));
+ var &= 0xff;
*reg &= ~(0xff << (8*byte));
- *reg |= var;
+ *reg |= (var << (8*byte));
}
enum gic_sgi_mode;