]> xenbits.xensource.com Git - people/aperard/xen-arm.git/commitdiff
nested vmx: enable VMX-preemption timer for L1 VMM
authorDongxiao Xu <dongxiao.xu@intel.com>
Fri, 30 Nov 2012 09:24:17 +0000 (09:24 +0000)
committerDongxiao Xu <dongxiao.xu@intel.com>
Fri, 30 Nov 2012 09:24:17 +0000 (09:24 +0000)
Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Acked-by: Jun Nakajima <jun.nakajima@intel.com>
Committed-by: Keir Fraser <keir@xen.org>
xen/arch/x86/hvm/vmx/vvmx.c
xen/include/asm-x86/hvm/vmx/vmcs.h

index 23c949be9f23821f8c73962c04db56be261b41de..e5d812ad36081cefaba1833e8a87663855c86a8b 100644 (file)
@@ -237,6 +237,13 @@ static void reg_write(struct cpu_user_regs *regs,
     *pval = value;
 }
 
+static inline u32 __n2_pin_exec_control(struct vcpu *v)
+{
+    struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
+
+    return __get_vvmcs(nvcpu->nv_vvmcx, PIN_BASED_VM_EXEC_CONTROL);
+}
+
 static inline u32 __n2_exec_control(struct vcpu *v)
 {
     struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
@@ -511,7 +518,6 @@ static void nvmx_update_pin_control(struct vcpu *v, unsigned long host_cntrl)
     struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
 
     shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, PIN_BASED_VM_EXEC_CONTROL);
-    shadow_cntrl &= ~PIN_BASED_PREEMPT_TIMER;
     shadow_cntrl |= host_cntrl;
     __vmwrite(PIN_BASED_VM_EXEC_CONTROL, shadow_cntrl);
 }
@@ -641,6 +647,7 @@ static const u16 vmcs_gstate_field[] = {
     GUEST_INTERRUPTIBILITY_INFO,
     GUEST_ACTIVITY_STATE,
     GUEST_SYSENTER_CS,
+    GUEST_PREEMPTION_TIMER,
     /* natural */
     GUEST_ES_BASE,
     GUEST_CS_BASE,
@@ -1269,7 +1276,9 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
         break;
     case MSR_IA32_VMX_PINBASED_CTLS:
         /* 1-seetings */
-        data = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
+        data = PIN_BASED_EXT_INTR_MASK |
+               PIN_BASED_NMI_EXITING |
+               PIN_BASED_PREEMPT_TIMER;
         data <<= 32;
        /* 0-settings */
         data |= 0;
@@ -1513,6 +1522,11 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs,
         if ( ctrl & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING )
             nvcpu->nv_vmexit_pending = 1;
         break;
+    case EXIT_REASON_VMX_PREEMPTION_TIMER_EXPIRED:
+        ctrl = __n2_pin_exec_control(v);
+        if ( ctrl & PIN_BASED_PREEMPT_TIMER )
+            nvcpu->nv_vmexit_pending = 1;
+        break;
     /* L1 has priority handling several other types of exits */
     case EXIT_REASON_HLT:
         ctrl = __n2_exec_control(v);
index 053de17e4fccd0cd5cb7dbf0e9dc9df68df27465..fbe9a52cfd17249f56b844dede954f558d19ca9f 100644 (file)
@@ -357,6 +357,7 @@ enum vmcs_field {
     GUEST_INTERRUPTIBILITY_INFO     = 0x00004824,
     GUEST_ACTIVITY_STATE            = 0x00004826,
     GUEST_SYSENTER_CS               = 0x0000482A,
+    GUEST_PREEMPTION_TIMER          = 0x0000482e,
     HOST_SYSENTER_CS                = 0x00004c00,
     CR0_GUEST_HOST_MASK             = 0x00006000,
     CR4_GUEST_HOST_MASK             = 0x00006002,