static int set_isa_irq_level(struct domain *d, uint8_t isa_irq,
uint8_t level)
{
- if ( isa_irq > 15 )
+ if ( isa_irq >= NR_ISA_IRQS )
return -EINVAL;
switch ( level )
unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq);
int vector = -1;
- ASSERT(isa_irq <= 15);
+ ASSERT(isa_irq < NR_ISA_IRQS);
spin_lock(&d->arch.hvm.irq_lock);
struct hvm_irq *hvm_irq = hvm_domain_irq(d);
unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq);
- ASSERT(isa_irq <= 15);
+ ASSERT(isa_irq < NR_ISA_IRQS);
spin_lock(&d->arch.hvm.irq_lock);
if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) )
{
vioapic_irq_positive_edge(d, gsi);
- if ( gsi <= 15 )
+ if ( gsi < NR_ISA_IRQS )
vpic_irq_positive_edge(d, gsi);
}
else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) )
{
- if ( gsi <= 15 )
+ if ( gsi < NR_ISA_IRQS )
vpic_irq_negative_edge(d, gsi);
}
break;
u8 old_isa_irq;
int i;
- if ( (link > 3) || (isa_irq > 15) )
+ if ( (link > 3) || (isa_irq >= NR_ISA_IRQS) )
return -EINVAL;
spin_lock(&d->arch.hvm.irq_lock);
{
case HVMIRQ_callback_gsi:
gsi = hvm_irq->callback_via.gsi;
- if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) )
+ if ( (--hvm_irq->gsi_assert_count[gsi] == 0) &&
+ (gsi < NR_ISA_IRQS) )
vpic_irq_negative_edge(d, gsi);
break;
case HVMIRQ_callback_pci_intx:
(hvm_irq->gsi_assert_count[gsi]++ == 0) )
{
vioapic_irq_positive_edge(d, gsi);
- if ( gsi <= 15 )
+ if ( gsi < NR_ISA_IRQS )
vpic_irq_positive_edge(d, gsi);
}
break;
return -EINVAL;
for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ )
- if ( pci_link->route[link] > 15 )
+ if ( pci_link->route[link] >= NR_ISA_IRQS )
{
printk(XENLOG_G_ERR
"HVM restore: PCI-ISA link %u out of range (%u)\n",
uint8_t mask = 1 << (irq & 7);
ASSERT(has_vpic(d));
- ASSERT(irq <= 15);
+ ASSERT(irq < NR_ISA_IRQS);
ASSERT(vpic_is_locked(vpic));
TRACE_TIME(TRC_HVM_EMUL_PIC_POSEDGE, irq);
uint8_t mask = 1 << (irq & 7);
ASSERT(has_vpic(d));
- ASSERT(irq <= 15);
+ ASSERT(irq < NR_ISA_IRQS);
ASSERT(vpic_is_locked(vpic));
TRACE_TIME(TRC_HVM_EMUL_PIC_NEGEDGE, irq);
extern int opt_irq_vector_map;
-#define platform_legacy_irq(irq) ((irq) < 16)
+#define platform_legacy_irq(irq) ((irq) < NR_ISA_IRQS)
void cf_check event_check_interrupt(void);
void cf_check invalidate_interrupt(void);
" than \"nr_irqs=\"\n");
max_gsi_irqs = nr_irqs;
}
- if ( max_gsi_irqs < 16 )
- max_gsi_irqs = 16;
+ if ( max_gsi_irqs < NR_ISA_IRQS )
+ max_gsi_irqs = NR_ISA_IRQS;
/* for PHYSDEVOP_pirq_eoi_gmfn guest assumptions */
if ( max_gsi_irqs > PAGE_SIZE * 8 )
max_gsi_irqs = PAGE_SIZE * 8;
- if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < 16 )
- nr_irqs_gsi = 16;
+ if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < NR_ISA_IRQS )
+ nr_irqs_gsi = NR_ISA_IRQS;
else if ( nr_irqs_gsi > max_gsi_irqs )
{
printk(XENLOG_WARNING "Limiting to %u GSI IRQs (found %u)\n",
max(0U + num_present_cpus() * NR_DYNAMIC_VECTORS,
8 * nr_irqs_gsi) :
nr_irqs_gsi;
- else if ( nr_irqs < 16 )
- nr_irqs = 16;
+ else if ( nr_irqs < NR_ISA_IRQS )
+ nr_irqs = NR_ISA_IRQS;
printk(XENLOG_INFO "IRQ limits: %u GSI, %u MSI/MSI-X\n",
nr_irqs_gsi, nr_irqs - nr_irqs_gsi);
}
bool __read_mostly opt_noirqbalance;
boolean_param("noirqbalance", opt_noirqbalance);
-unsigned int __read_mostly nr_irqs_gsi = 16;
+unsigned int __read_mostly nr_irqs_gsi = NR_ISA_IRQS;
unsigned int __read_mostly nr_irqs;
integer_param("nr_irqs", nr_irqs);
int pirq_guest_unmask(struct domain *d)
{
unsigned int pirq = 0, n, i;
- struct pirq *pirqs[16];
+ struct pirq *pirqs[NR_ISA_IRQS];
do {
n = radix_tree_gang_lookup(&d->pirq_tree, (void **)pirqs, pirq,
if ( type == MAP_PIRQ_TYPE_GSI )
{
- for ( i = 16; i < nr_irqs_gsi; i++ )
+ for ( i = NR_ISA_IRQS; i < nr_irqs_gsi; i++ )
if ( is_free_pirq(d, pirq_info(d, i)) )
{
pirq_get_info(d, i);