ArmPkg/ArmMmuLib ARM: Split off XN page descriptor bit from type field

With large page support out of the picture, we can treat bits 1 and 0 of
the page descriptor as individual valid and XN bits, instead of treating
XN as a page type. Doing so aligns the handling of the attribute with
the section descriptor layout, as well as the XN handling on AArch64,
and this is beneficial for maintainability.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index 7501ebfdf97f046cbef0489a4feb35f83ab55a0e..6a2584ceb3035b2533e52adf799367c0f83cea00 100644 (file)
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -54,11 +54,9 @@
 #define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc)  (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)\r
 \r
 // Translation table descriptor types\r
-#define TT_DESCRIPTOR_PAGE_TYPE_MASK       (3UL << 0)\r
-#define TT_DESCRIPTOR_PAGE_TYPE_FAULT      (0UL << 0)\r
-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE       (2UL << 0)\r
-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN    (3UL << 0)\r
-#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE  (1UL << 0)\r
+#define TT_DESCRIPTOR_PAGE_TYPE_MASK   (1UL << 1)\r
+#define TT_DESCRIPTOR_PAGE_TYPE_FAULT  (0UL << 1)\r
+#define TT_DESCRIPTOR_PAGE_TYPE_PAGE   (1UL << 1)\r
 \r
 // Section descriptor definitions\r
 #define TT_DESCRIPTOR_SECTION_SIZE  (0x00100000)\r

diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
index 9ca00c976d5f94e7e06905044a21fe8381ff2b07..12d0f4c30f8ead8ad9cd0360c815fd1e9144a97b 100644 (file)
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
@@ -104,12 +104,8 @@ UpdatePageEntries (
 \r
   // EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)\r
   // EntryValue: values at bit positions specified by EntryMask\r
-  EntryMask = TT_DESCRIPTOR_PAGE_TYPE_MASK | TT_DESCRIPTOR_PAGE_AP_MASK;\r
-  if ((Attributes & EFI_MEMORY_XP) != 0) {\r
-    EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN;\r
-  } else {\r
-    EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE;\r
-  }\r
+  EntryMask = TT_DESCRIPTOR_PAGE_TYPE_MASK | TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK;\r
+  EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE;\r
 \r
   // Although the PI spec is unclear on this, the GCD guarantees that only\r
   // one Attribute bit is set at a time, so the order of the conditionals below\r
@@ -148,6 +144,10 @@ UpdatePageEntries (
     EntryValue |= TT_DESCRIPTOR_PAGE_AP_RW_RW;\r
   }\r
 \r
+  if ((Attributes & EFI_MEMORY_XP) != 0) {\r
+    EntryValue |= TT_DESCRIPTOR_PAGE_XN_MASK;\r
+  }\r
+\r
   // Obtain page table base\r
   FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();\r
 \r