x86/cpuid: address violation of MISRA C Rule 16.2

Refactor the switch so that a violation of MISRA C Rule 16.2 is resolved
(A switch label shall only be used when the most closely-enclosing
compound statement is the body of a switch statement).
Note that the switch clause ending with the pseudo
keyword "fallthrough" is an allowed exception to Rule 16.3.

No functional change.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Acked-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 7290a979c667b7e03f50c215747b41fea06f1ad2..7a38e032146a57f7d992a44808dab947e1ae5487 100644 (file)
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -331,23 +331,22 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
         switch ( subleaf )
         {
         case 1:
-            if ( p->xstate.xsavec || p->xstate.xsaves )
-            {
-                /*
-                 * TODO: Figure out what to do for XSS state.  VT-x manages
-                 * host vs guest MSR_XSS automatically, so as soon as we start
-                 * supporting any XSS states, the wrong XSS will be in
-                 * context.
-                 */
-                BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            if ( !p->xstate.xsavec && !p->xstate.xsaves )
+                break;
 
-                /*
-                 * Read CPUID[0xD,0/1].EBX from hardware.  They vary with
-                 * enabled XSTATE, and appropraite XCR0|XSS are in context.
-                 */
+            /*
+             * TODO: Figure out what to do for XSS state.  VT-x manages host
+             * vs guest MSR_XSS automatically, so as soon as we start
+             * supporting any XSS states, the wrong XSS will be in context.
+             */
+            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            fallthrough;
         case 0:
-                res->b = cpuid_count_ebx(leaf, subleaf);
-            }
+            /*
+             * Read CPUID[0xD,0/1].EBX from hardware.  They vary with enabled
+             * XSTATE, and appropriate XCR0|XSS are in context.
+             */
+            res->b = cpuid_count_ebx(leaf, subleaf);
             break;
         }
         break;