#define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */
#define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */
#define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */
+#define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */
#define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */
#define SVM_FEATURE_VGIF 16 /* Virtual GIF */
#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF)
#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
+#define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH)
#define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR)
#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
-#define SVM_PAUSEFILTER_INIT 3000
+#define SVM_PAUSEFILTER_INIT 4000
+#define SVM_PAUSETHRESH_INIT 1000
/* TSC rate */
#define DEFAULT_TSC_RATIO 0x0000000100000000ULL
u64 res04; /* offset 0x28 */
u64 res05; /* offset 0x30 */
u32 res06; /* offset 0x38 */
- u16 res06a; /* offset 0x3C */
+ u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */
u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */
u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */
u64 _msrpm_base_pa; /* offset 0x48 - cleanbit 1 */
VMCB_ACCESSORS(general1_intercepts, intercepts)
VMCB_ACCESSORS(general2_intercepts, intercepts)
VMCB_ACCESSORS(pause_filter_count, intercepts)
+VMCB_ACCESSORS(pause_filter_thresh, intercepts)
VMCB_ACCESSORS(tsc_offset, intercepts)
VMCB_ACCESSORS(iopm_base_pa, iopm)
VMCB_ACCESSORS(msrpm_base_pa, iopm)