x86: don't use VA for cache flush when also flushing TLB

Doing both flushes at once is a strong indication for the address
mapping to either having got dropped (in which case the cache flush,
when done via INVLPG, would fault) or its physical address having
changed (in which case the cache flush would end up being done on the
wrong address range). There is no adverse effect (other than the
obvious performance one) using WBINVD in this case regardless of the
range's size; only map_pages_to_xen() uses combined flushes at present.

This problem was observed with the 2nd try backport of d6cb14b3 ("VT-d:
suppress UR signaling for desktop chipsets") to 4.2 (where ioremap()
needs to be replaced with set_fixmap_nocache(); the previously
commented out and now being re-enabled __set_fixmap(, 0, 0) there to
undo the mapping resulted in the first of the above two scenarios).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
master commit: 50df6f7429f73364bbddb0970a3a34faa01a7790
master date: 2014-05-28 09:51:07 +0200

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index e0388e7cd9451a6fe2feef149c0e16e6a46f0337..1b7565267ee93a1e3d00cb8ff52276b73a65e42e 100644 (file)
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -152,7 +152,8 @@ void flush_area_local(const void *va, unsigned int flags)
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
 
-        if ( c->x86_clflush_size && c->x86_cache_size && sz &&
+        if ( !(flags & (FLUSH_TLB|FLUSH_TLB_GLOBAL)) &&
+             c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
             va = (const void *)((unsigned long)va & ~(sz - 1));

diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c
index c0f409f19cf4fc0bd6421ff17097454e123360d2..91b76120ba011734b097fdf86acb68ad06872ac4 100644 (file)
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -482,7 +482,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev)
 
             set_fixmap_nocache(FIX_IOMMU_MMIO_BASE_0, pa);
             __set_bit(0x1c8 * 8 + 20, va);
-            /* __set_fixmap(FIX_IOMMU_MMIO_BASE_0, 0, 0); */
+            __set_fixmap(FIX_IOMMU_MMIO_BASE_0, 0, 0);
             printk(XENLOG_INFO "Masked UR signaling on %04x:%02x:%02x.%u\n",
                    seg, bus, dev, func);
         }