KVM_CAP_LAST_INFO
};
+static NotifierList kvm_irqchip_change_notifiers =
+ NOTIFIER_LIST_INITIALIZER(kvm_irqchip_change_notifiers);
+
#define kvm_slots_lock(kml) qemu_mutex_lock(&(kml)->slots_lock)
#define kvm_slots_unlock(kml) qemu_mutex_unlock(&(kml)->slots_lock)
trace_kvm_irqchip_release_virq(virq);
}
+void kvm_irqchip_add_change_notifier(Notifier *n)
+{
+ notifier_list_add(&kvm_irqchip_change_notifiers, n);
+}
+
+void kvm_irqchip_remove_change_notifier(Notifier *n)
+{
+ notifier_remove(n);
+}
+
+void kvm_irqchip_change_notify(void)
+{
+ notifier_list_notify(&kvm_irqchip_change_notifiers, NULL);
+}
+
static unsigned int kvm_hash_msi(uint32_t data)
{
/* This is optimized for IA32 MSI layout. However, no other arch shall
{
}
+void kvm_irqchip_add_change_notifier(Notifier *n)
+{
+}
+
+void kvm_irqchip_remove_change_notifier(Notifier *n)
+{
+}
+
+void kvm_irqchip_change_notify(void)
+{
+}
+
int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter)
{
return -ENOSYS;
struct KVMState;
typedef struct KVMState KVMState;
extern KVMState *kvm_state;
+typedef struct Notifier Notifier;
/* external API */
void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin);
+void kvm_irqchip_add_change_notifier(Notifier *n);
+void kvm_irqchip_remove_change_notifier(Notifier *n);
+void kvm_irqchip_change_notify(void);
+
void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic);
struct kvm_guest_debug;