x86/mm: re-indent after "re-arrange get_page_from_l<N>e() vs pv_l1tf_check_l<N>e()"

That earlier change introduced two "else switch ()" constructs which now
get converted back to "normal" style (indentation). To limit indentation
depth, a conditional gets inverted in ptwr_emulated_update().

No functional change intended.

Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index d37eea53d1c488fc530da2cac8ee244c5dfabb74..db7faa963244a3a76bb705d7d314852a049b0683 100644 (file)
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -1413,16 +1413,21 @@ static int alloc_l1_table(struct page_info *page)
             if ( ret )
                 goto out;
         }
-        else switch ( ret = get_page_from_l1e(pl1e[i], d, d) )
+        else
         {
-        default:
-            goto fail;
-        case 0:
-            break;
-        case _PAGE_RW ... _PAGE_RW | PAGE_CACHE_ATTRS:
-            ASSERT(!(ret & ~(_PAGE_RW | PAGE_CACHE_ATTRS)));
-            l1e_flip_flags(pl1e[i], ret);
-            break;
+            switch ( ret = get_page_from_l1e(pl1e[i], d, d) )
+            {
+            default:
+                goto fail;
+
+            case 0:
+                break;
+
+            case _PAGE_RW ... _PAGE_RW | PAGE_CACHE_ATTRS:
+                ASSERT(!(ret & ~(_PAGE_RW | PAGE_CACHE_ATTRS)));
+                l1e_flip_flags(pl1e[i], ret);
+                break;
+            }
         }
 
         pl1e[i] = adjust_guest_l1e(pl1e[i], d);

diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 1246eeb1c52f4d9ffdd20afe58b9e9d940a86bf0..e7a7179dda2ab15fde2dbab6a60aa8b64763e54a 100644 (file)
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -136,12 +136,18 @@ static int ptwr_emulated_update(unsigned long addr, intpte_t *p_old,
         if ( pv_l1tf_check_l1e(d, nl1e) )
             return X86EMUL_RETRY;
     }
-    else switch ( ret = get_page_from_l1e(nl1e, d, d) )
+    else
     {
-    default:
-        if ( is_pv_32bit_domain(d) && (bytes == 4) && (unaligned_addr & 4) &&
-             !p_old && (l1e_get_flags(nl1e) & _PAGE_PRESENT) )
+        switch ( ret = get_page_from_l1e(nl1e, d, d) )
         {
+        default:
+            if ( !is_pv_32bit_domain(d) || (bytes != 4) ||
+                 !(unaligned_addr & 4) || p_old ||
+                 !(l1e_get_flags(nl1e) & _PAGE_PRESENT) )
+            {
+                gdprintk(XENLOG_WARNING, "could not get_page_from_l1e()\n");
+                return X86EMUL_UNHANDLEABLE;
+            }
             /*
              * If this is an upper-half write to a PAE PTE then we assume that
              * the guest has simply got the two writes the wrong way round. We
@@ -151,19 +157,16 @@ static int ptwr_emulated_update(unsigned long addr, intpte_t *p_old,
             gdprintk(XENLOG_DEBUG, "ptwr_emulate: fixing up invalid PAE PTE %"
                      PRIpte"\n", l1e_get_intpte(nl1e));
             l1e_remove_flags(nl1e, _PAGE_PRESENT);
+            break;
+
+        case 0:
+            break;
+
+        case _PAGE_RW ... _PAGE_RW | PAGE_CACHE_ATTRS:
+            ASSERT(!(ret & ~(_PAGE_RW | PAGE_CACHE_ATTRS)));
+            l1e_flip_flags(nl1e, ret);
+            break;
         }
-        else
-        {
-            gdprintk(XENLOG_WARNING, "could not get_page_from_l1e()\n");
-            return X86EMUL_UNHANDLEABLE;
-        }
-        break;
-    case 0:
-        break;
-    case _PAGE_RW ... _PAGE_RW | PAGE_CACHE_ATTRS:
-        ASSERT(!(ret & ~(_PAGE_RW | PAGE_CACHE_ATTRS)));
-        l1e_flip_flags(nl1e, ret);
-        break;
     }
 
     nl1e = adjust_guest_l1e(nl1e, d);