Currently IRQs routing is initialized to the wrong register and overwrites
interrupt configuration register (ICFGRn).
Reported-by: Sander Bogaert <sander.bogaert@elis.ugent.be>
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
/* Route all global IRQs to this CPU */
for ( i = 32; i < gic.lines; i += 4 )
- GICD[GICD_ICFGR + i / 4] = cpumask;
+ GICD[GICD_ITARGETSR + i / 4] = cpumask;
/* Default priority for global interrupts */
for ( i = 32; i < gic.lines; i += 4 )