For AArch64, `ukarch_rctx_stackpush` may add padding to make sure
the `sp` register is aligned to 16 bytes. But there're also some
use cases where alignment is not allowed. In such cases, the newly
added `ukarch_rctx_stackpush_packed` and `ukarch_rstack_push_packed`
will be useful.
Signed-off-by: Tianyi Liu <i.pear@outlook.com>
Reviewed-by: Marco Schlumpp <marco@unikraft.io>
Reviewed-by: Andrei Tatar <andrei@unikraft.io>
Approved-by: Razvan Deaconescu <razvand@unikraft.io>
GitHub-Closes: #1096
__sp__; \
})
+#define ukarch_rstack_push_packed(sp, value) \
+ ({ \
+ unsigned long __sp__ = (sp); \
+ __sp__ -= sizeof(value); \
+ *((typeof(value) *) __sp__) = (value); \
+ __sp__; \
+ })
+
#define ukarch_gen_sp(base, len) \
({ \
unsigned long __sp__ = (unsigned long) (base) \
__sp__; \
})
+#define ukarch_rstack_push_packed(sp, value) \
+ ukarch_rstack_push(sp, value)
+
#define UKARCH_SP_ALIGN (1 << 4)
#define UKARCH_SP_ALIGN_MASK (UKARCH_SP_ALIGN - 1)
(ctx)->sp = ukarch_rstack_push((ctx)->sp, (value)); \
})
+/**
+ * Similar to `ukarch_rctx_stackpush()` but without alignment.
+ */
+#define ukarch_rctx_stackpush_packed(ctx, value) \
+ ({ \
+ (ctx)->sp = ukarch_rstack_push_packed((ctx)->sp, (value)); \
+ })
+
/**
* Switch the current logical CPU to context `load`. The current context
* is stored to `store`. The standard register set is saved to `store`'s