]> xenbits.xensource.com Git - qemu-xen-4.1-testing.git/commitdiff
Thumb semihosting fixes.
authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
Sat, 24 Nov 2007 23:22:11 +0000 (23:22 +0000)
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
Sat, 24 Nov 2007 23:22:11 +0000 (23:22 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3729 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/helper.c

index 038025dac02bac5c197f6a4bc92fbab12666826f..40bdeb186e67d15073bd6ada4e3ed61416fcc514 100644 (file)
@@ -602,6 +602,15 @@ void do_interrupt_v7m(CPUARMState *env)
         armv7m_nvic_set_pending(env->v7m.nvic, ARMV7M_EXCP_MEM);
         return;
     case EXCP_BKPT:
+        if (semihosting_enabled) {
+            int nr;
+            nr = lduw_code(env->regs[15]) & 0xff;
+            if (nr == 0xab) {
+                env->regs[15] += 2;
+                env->regs[0] = do_arm_semihosting(env);
+                return;
+            }
+        }
         armv7m_nvic_set_pending(env->v7m.nvic, ARMV7M_EXCP_DEBUG);
         return;
     case EXCP_IRQ:
@@ -687,7 +696,7 @@ void do_interrupt(CPUARMState *env)
         break;
     case EXCP_BKPT:
         /* See if this is a semihosting syscall.  */
-        if (env->thumb) {
+        if (env->thumb && semihosting_enabled) {
             mask = lduw_code(env->regs[15]) & 0xff;
             if (mask == 0xab
                   && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) {