{
case 0xf ... 0x17:
disable_c1e(NULL);
- if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value)) {
-#ifdef CONFIG_PV
- pv_post_outb_hook = amd_check_disable_c1e;
-#endif
+ if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value))
amd_acpi_c1e_quirk = true;
- }
break;
}
#include <xen/spinlock.h>
#include <xen/trace.h>
+#include <asm/amd.h>
#include <asm/apic.h>
#include <asm/debugreg.h>
#include <asm/hpet.h>
void host_to_guest_gpr_switch(struct cpu_user_regs *);
unsigned long guest_to_host_gpr_switch(unsigned long);
-void (*pv_post_outb_hook)(unsigned int port, u8 value);
-
typedef void io_emul_stub_t(struct cpu_user_regs *);
static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode,
{
case 1:
outb((uint8_t)data, port);
- if ( pv_post_outb_hook )
- pv_post_outb_hook(port, (uint8_t)data);
+ if ( amd_acpi_c1e_quirk )
+ amd_check_disable_c1e(port, (uint8_t)data);
break;
case 2:
outw((uint16_t)data, port);
io_emul_stub_setup(poc, ctxt->opcode, port, bytes);
io_emul(ctxt->regs);
- if ( (bytes == 1) && pv_post_outb_hook )
- pv_post_outb_hook(port, val);
+ if ( (bytes == 1) && amd_acpi_c1e_quirk )
+ amd_check_disable_c1e(port, val);
return X86EMUL_DONE;
}
__OUT(w,"w",short)
__OUT(l,,int)
-extern void (*pv_post_outb_hook)(unsigned int port, u8 value);
-
/* Function pointer used to handle platform specific I/O port emulation. */
#define IOEMUL_QUIRK_STUB_BYTES 10
extern bool (*ioemul_handle_quirk)(