]> xenbits.xensource.com Git - xen.git/commitdiff
x86/boot: Move MSR policy initialisation logic into cpu-policy.c
authorAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 3 Apr 2023 16:48:43 +0000 (17:48 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 3 Aug 2023 18:14:19 +0000 (19:14 +0100)
Switch to the newer cpu_policy nomenclature.

No practical change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be)

xen/arch/x86/cpu-policy.c
xen/arch/x86/msr.c
xen/arch/x86/setup.c
xen/include/asm-x86/cpu-policy.h
xen/include/asm-x86/msr.h

index 4c5fd70cf1e9819f69aa7e1b5a9824715c3797a2..d774d281c22bf058f962c4b0d9a9d0270c65a685 100644 (file)
@@ -20,6 +20,90 @@ struct cpu_policy __read_mostly   hvm_max_cpu_policy;
 struct cpu_policy __read_mostly   hvm_def_cpu_policy;
 #endif
 
+static void __init calculate_raw_policy(void)
+{
+    struct cpu_policy *p = &raw_cpu_policy;
+
+    /* 0x000000ce  MSR_INTEL_PLATFORM_INFO */
+    /* Was already added by probe_cpuid_faulting() */
+
+    if ( cpu_has_arch_caps )
+        rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw);
+}
+
+static void __init calculate_host_policy(void)
+{
+    struct cpu_policy *p = &host_cpu_policy;
+
+    *p = raw_cpu_policy;
+
+    /* 0x000000ce  MSR_INTEL_PLATFORM_INFO */
+    /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
+    p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
+
+    /* Temporary, until we have known_features[] for feature bits in MSRs. */
+    p->arch_caps.raw &=
+        (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
+         ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
+         ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
+         ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
+         ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
+         ARCH_CAPS_PBRSB_NO);
+}
+
+static void __init calculate_pv_max_policy(void)
+{
+    struct cpu_policy *p = &pv_max_cpu_policy;
+
+    *p = host_cpu_policy;
+
+    p->arch_caps.raw = 0; /* Not supported yet. */
+}
+
+static void __init calculate_pv_def_policy(void)
+{
+    struct cpu_policy *p = &pv_def_cpu_policy;
+
+    *p = pv_max_cpu_policy;
+}
+
+static void __init calculate_hvm_max_policy(void)
+{
+    struct cpu_policy *p = &hvm_max_cpu_policy;
+
+    *p = host_cpu_policy;
+
+    /* It's always possible to emulate CPUID faulting for HVM guests */
+    p->platform_info.cpuid_faulting = true;
+
+    p->arch_caps.raw = 0; /* Not supported yet. */
+}
+
+static void __init calculate_hvm_def_policy(void)
+{
+    struct cpu_policy *p = &hvm_def_cpu_policy;
+
+    *p = hvm_max_cpu_policy;
+}
+
+void __init init_guest_cpu_policies(void)
+{
+    calculate_raw_policy();
+    calculate_host_policy();
+
+    if ( IS_ENABLED(CONFIG_PV) )
+    {
+        calculate_pv_max_policy();
+        calculate_pv_def_policy();
+    }
+
+    if ( hvm_enabled )
+    {
+        calculate_hvm_max_policy();
+        calculate_hvm_def_policy();
+    }
+}
+
 int init_domain_cpu_policy(struct domain *d)
 {
     struct cpu_policy *p = is_pv_domain(d)
index 7bf8516e2669431be9feb795598bd30f8c79351b..40a7a93b2446d35b1c9efe6e9495740722a81cbb 100644 (file)
 
 DEFINE_PER_CPU(uint32_t, tsc_aux);
 
-static void __init calculate_raw_policy(void)
-{
-    struct msr_policy *mp = &raw_cpu_policy;
-
-    /* 0x000000ce  MSR_INTEL_PLATFORM_INFO */
-    /* Was already added by probe_cpuid_faulting() */
-
-    if ( cpu_has_arch_caps )
-        rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw);
-}
-
-static void __init calculate_host_policy(void)
-{
-    struct msr_policy *mp = &host_cpu_policy;
-
-    *mp = raw_cpu_policy;
-
-    /* 0x000000ce  MSR_INTEL_PLATFORM_INFO */
-    /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
-    mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
-
-    /* Temporary, until we have known_features[] for feature bits in MSRs. */
-    mp->arch_caps.raw &=
-        (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
-         ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
-         ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
-         ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
-         ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
-         ARCH_CAPS_PBRSB_NO);
-}
-
-static void __init calculate_pv_max_policy(void)
-{
-    struct msr_policy *mp = &pv_max_cpu_policy;
-
-    *mp = host_cpu_policy;
-
-    mp->arch_caps.raw = 0; /* Not supported yet. */
-}
-
-static void __init calculate_pv_def_policy(void)
-{
-    struct msr_policy *mp = &pv_def_cpu_policy;
-
-    *mp = pv_max_cpu_policy;
-}
-
-static void __init calculate_hvm_max_policy(void)
-{
-    struct msr_policy *mp = &hvm_max_cpu_policy;
-
-    *mp = host_cpu_policy;
-
-    /* It's always possible to emulate CPUID faulting for HVM guests */
-    mp->platform_info.cpuid_faulting = true;
-
-    mp->arch_caps.raw = 0; /* Not supported yet. */
-}
-
-static void __init calculate_hvm_def_policy(void)
-{
-    struct msr_policy *mp = &hvm_def_cpu_policy;
-
-    *mp = hvm_max_cpu_policy;
-}
-
-void __init init_guest_msr_policy(void)
-{
-    calculate_raw_policy();
-    calculate_host_policy();
-
-    if ( IS_ENABLED(CONFIG_PV) )
-    {
-        calculate_pv_max_policy();
-        calculate_pv_def_policy();
-    }
-
-    if ( hvm_enabled )
-    {
-        calculate_hvm_max_policy();
-        calculate_hvm_def_policy();
-    }
-}
-
 int init_vcpu_msr_policy(struct vcpu *v)
 {
     struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs);
index 44b09b8be99e186b24f1d2bf2cdad4474c761e55..7a5253fd406e457245626294778ec6e37ce87fa5 100644 (file)
@@ -49,6 +49,7 @@
 #include <asm/nmi.h>
 #include <asm/alternative.h>
 #include <asm/mc146818rtc.h>
+#include <asm/cpu-policy.h>
 #include <asm/cpuid.h>
 #include <asm/spec_ctrl.h>
 #include <asm/guest.h>
@@ -1945,7 +1946,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
         panic("Could not protect TXT memory regions\n");
 
     init_guest_cpuid();
-    init_guest_msr_policy();
+    init_guest_cpu_policies();
 
     if ( xen_cpuidle )
         xen_processor_pmbits |= XEN_PROCESSOR_PM_CX;
index 9ba34bbf5ea19a93f6216ca1800ccf07eab7071a..13e2a1f86d134c5d0607e8f379cb035e5ccc87f6 100644 (file)
@@ -12,6 +12,9 @@ extern struct cpu_policy  pv_def_cpu_policy;
 extern struct cpu_policy hvm_max_cpu_policy;
 extern struct cpu_policy hvm_def_cpu_policy;
 
+/* Initialise the guest cpu_policy objects. */
+void init_guest_cpu_policies(void);
+
 /* Allocate and initialise a CPU policy suitable for the domain. */
 int init_domain_cpu_policy(struct domain *d);
 
index b9d0a96d9d37ff6e9cf5d72eae0a4a5d6434e4ef..b509a5e56410bc5073cad5cf0966803b288ceab6 100644 (file)
@@ -333,7 +333,6 @@ struct vcpu_msrs
     uint32_t dr_mask[4];
 };
 
-void init_guest_msr_policy(void);
 int init_vcpu_msr_policy(struct vcpu *v);
 
 /*