#define MSR_AP 23 /* Access privilege state on 602 hflags */
#define MSR_SA 22 /* Supervisor access mode on 602 hflags */
#define MSR_KEY 19 /* key bit on 603e */
-#define MSR_POW 18 /* Power management x */
-#define MSR_WE 18 /* Wait state enable on embedded PowerPC x */
+#define MSR_POW 18 /* Power management */
#define MSR_TGPR 17 /* TGPR usage on 602/603 x */
#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC x */
#define MSR_ILE 16 /* Interrupt little-endian mode */
#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x */
#define MSR_FE1 8 /* Floating point exception mode 1 hflags */
#define MSR_AL 7 /* AL bit on POWER */
-#define MSR_IP 6 /* Interrupt prefix */
+#define MSR_EP 3 /* Exception prefix on 601 */
#define MSR_IR 5 /* Instruction relocate */
#define MSR_DR 4 /* Data relocate */
-#define MSR_PE 3 /* Protection enable on 403 x */
-#define MSR_EP 3 /* Exception prefix on 601 x */
+#define MSR_PE 3 /* Protection enable on 403 */
#define MSR_PX 2 /* Protection exclusive on 403 x */
#define MSR_PMM 2 /* Performance monitor mark on POWER x */
#define MSR_RI 1 /* Recoverable interrupt 1 */
#define msr_sa env->msr[MSR_SA]
#define msr_key env->msr[MSR_KEY]
#define msr_pow env->msr[MSR_POW]
-#define msr_we env->msr[MSR_WE]
#define msr_tgpr env->msr[MSR_TGPR]
#define msr_ce env->msr[MSR_CE]
#define msr_ile env->msr[MSR_ILE]
#define msr_de env->msr[MSR_DE]
#define msr_fe1 env->msr[MSR_FE1]
#define msr_al env->msr[MSR_AL]
-#define msr_ip env->msr[MSR_IP]
#define msr_ir env->msr[MSR_IR]
#define msr_dr env->msr[MSR_DR]
#define msr_pe env->msr[MSR_PE]
#define msr_le env->msr[MSR_LE]
enum {
- /* Beware that MSR bits are given using IBM standard (ie MSB is 0 !) */
POWERPC_FLAG_NONE = 0x00000000,
/* Flag for MSR bit 25 signification (VRE/SPE) */
POWERPC_FLAG_SPE = 0x00000001,
POWERPC_FLAG_VRE = 0x00000002,
- /* Flag for MSR bit 18 may not be needed... */
- POWERPC_FLAG_POW = 0x00000004,
- POWERPC_FLAG_WE = 0x00000008,
/* Flag for MSR bit 17 signification (TGPR/CE) */
- POWERPC_FLAG_TGPR = 0x00000010,
- POWERPC_FLAG_CE = 0x00000020,
+ POWERPC_FLAG_TGPR = 0x00000004,
+ POWERPC_FLAG_CE = 0x00000008,
/* Flag for MSR bit 10 signification (SE/DWE/UBLE) */
- POWERPC_FLAG_SE = 0x00000040,
- POWERPC_FLAG_DWE = 0x00000080,
- POWERPC_FLAG_UBLE = 0x00000100,
+ POWERPC_FLAG_SE = 0x00000010,
+ POWERPC_FLAG_DWE = 0x00000020,
+ POWERPC_FLAG_UBLE = 0x00000040,
/* Flag for MSR bit 9 signification (BE/DE) */
- POWERPC_FLAG_BE = 0x00000200,
- POWERPC_FLAG_DE = 0x00000400,
- /* Flag for MSR bit 3 signification (PE/EP) */
- POWERPC_FLAG_PE = 0x00000800,
- POWERPC_FLAG_EP = 0x00001000,
+ POWERPC_FLAG_BE = 0x00000080,
+ POWERPC_FLAG_DE = 0x00000100,
/* Flag for MSR but 2 signification (PX/PMM) */
- POWERPC_FLAG_PX = 0x00002000,
- POWERPC_FLAG_PMM = 0x00004000,
+ POWERPC_FLAG_PX = 0x00000200,
+ POWERPC_FLAG_PMM = 0x00000400,
};
/*****************************************************************************/
#define POWERPC_EXCP_401 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_401 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_401 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_401 (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
static void init_proc_401 (CPUPPCState *env)
{
#define POWERPC_EXCP_401x2 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_401x2 (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_401x2 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_401x2 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_401x2 (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
static void init_proc_401x2 (CPUPPCState *env)
{
#define POWERPC_EXCP_401x3 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_401x3 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_401x3 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_401x3 (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
__attribute__ (( unused ))
static void init_proc_401x3 (CPUPPCState *env)
#define POWERPC_EXCP_IOP480 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_IOP480 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_IOP480 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_IOP480 (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
static void init_proc_IOP480 (CPUPPCState *env)
{
#define POWERPC_EXCP_403 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_403 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_403 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_403 (POWERPC_FLAG_CE | POWERPC_FLAG_PX)
static void init_proc_403 (CPUPPCState *env)
{
#define POWERPC_EXCP_403GCX (POWERPC_EXCP_40x)
#define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401)
#define POWERPC_BFDM_403GCX (bfd_mach_ppc_403)
-#define POWERPC_FLAG_403GCX (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_403GCX (POWERPC_FLAG_CE | POWERPC_FLAG_PX)
static void init_proc_403GCX (CPUPPCState *env)
{
#define POWERPC_EXCP_405 (POWERPC_EXCP_40x)
#define POWERPC_INPUT_405 (PPC_FLAGS_INPUT_405)
#define POWERPC_BFDM_405 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_405 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_405 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
static void init_proc_405 (CPUPPCState *env)
{
#define POWERPC_EXCP_440EP (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_440EP (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_440EP (bfd_mach_ppc_403)
-#define POWERPC_FLAG_440EP (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_440EP (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
static void init_proc_440EP (CPUPPCState *env)
{
#define POWERPC_EXCP_440GP (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_440GP (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_440GP (bfd_mach_ppc_403)
-#define POWERPC_FLAG_440GP (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_440GP (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
static void init_proc_440GP (CPUPPCState *env)
{
#define POWERPC_EXCP_440x4 (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_440x4 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_440x4 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_440x4 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
__attribute__ (( unused ))
static void init_proc_440x4 (CPUPPCState *env)
#define POWERPC_EXCP_440x5 (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_440x5 (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_440x5 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_440x5 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_440x5 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
static void init_proc_440x5 (CPUPPCState *env)
{
#define POWERPC_EXCP_460 (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_460 (bfd_mach_ppc_403)
-#define POWERPC_FLAG_460 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_460 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
__attribute__ (( unused ))
static void init_proc_460 (CPUPPCState *env)
#define POWERPC_EXCP_460F (POWERPC_EXCP_BOOKE)
#define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE)
#define POWERPC_BFDM_460F (bfd_mach_ppc_403)
-#define POWERPC_FLAG_460F (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_460F (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
+ POWERPC_FLAG_DE)
__attribute__ (( unused ))
static void init_proc_460F (CPUPPCState *env)
/* PowerPC 601 */
#define POWERPC_INSNS_601 (POWERPC_INSNS_6xx | PPC_CACHE_DCBZ | \
PPC_SEGMENT | PPC_EXTERN | PPC_POWER_BR)
-#define POWERPC_MSRM_601 (0x000000000000FE70ULL)
+#define POWERPC_MSRM_601 (0x000000000000FD70ULL)
//#define POWERPC_MMU_601 (POWERPC_MMU_601)
//#define POWERPC_EXCP_601 (POWERPC_EXCP_601)
#define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_601 (bfd_mach_ppc_601)
-#define POWERPC_FLAG_601 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_601 (POWERPC_FLAG_SE)
static void init_proc_601 (CPUPPCState *env)
{
//#define POWERPC_EXCP_602 (POWERPC_EXCP_602)
#define POWERPC_INPUT_602 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_602 (bfd_mach_ppc_602)
-#define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR)
+#define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE)
static void init_proc_602 (CPUPPCState *env)
{
/* PowerPC 603 */
#define POWERPC_INSNS_603 (POWERPC_INSNS_WORKS | PPC_6xx_TLB | PPC_EXTERN)
-#define POWERPC_MSRM_603 (0x000000000001FF73ULL)
+#define POWERPC_MSRM_603 (0x000000000007FF73ULL)
#define POWERPC_MMU_603 (POWERPC_MMU_SOFT_6xx)
//#define POWERPC_EXCP_603 (POWERPC_EXCP_603)
#define POWERPC_INPUT_603 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_603 (bfd_mach_ppc_603)
-#define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR)
+#define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE)
static void init_proc_603 (CPUPPCState *env)
{
//#define POWERPC_EXCP_603E (POWERPC_EXCP_603E)
#define POWERPC_INPUT_603E (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_603E (bfd_mach_ppc_ec603e)
-#define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR)
+#define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE)
static void init_proc_603E (CPUPPCState *env)
{
//#define POWERPC_EXCP_G2 (POWERPC_EXCP_G2)
#define POWERPC_INPUT_G2 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_G2 (bfd_mach_ppc_ec603e)
-#define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR)
+#define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE)
static void init_proc_G2 (CPUPPCState *env)
{
#define POWERPC_EXCP_G2LE (POWERPC_EXCP_G2)
#define POWERPC_INPUT_G2LE (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_G2LE (bfd_mach_ppc_ec603e)
-#define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR)
+#define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE)
static void init_proc_G2LE (CPUPPCState *env)
{
//#define POWERPC_EXCP_604 (POWERPC_EXCP_604)
#define POWERPC_INPUT_604 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_604 (bfd_mach_ppc_604)
-#define POWERPC_FLAG_604 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_604 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
+ POWERPC_FLAG_PMM)
static void init_proc_604 (CPUPPCState *env)
{
/* PowerPC 740/750 (aka G3) */
#define POWERPC_INSNS_7x0 (POWERPC_INSNS_WORKS | PPC_EXTERN)
-#define POWERPC_MSRM_7x0 (0x000000000007FF77ULL)
+#define POWERPC_MSRM_7x0 (0x000000000005FF77ULL)
#define POWERPC_MMU_7x0 (POWERPC_MMU_32B)
//#define POWERPC_EXCP_7x0 (POWERPC_EXCP_7x0)
#define POWERPC_INPUT_7x0 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7x0 (bfd_mach_ppc_750)
-#define POWERPC_FLAG_7x0 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_7x0 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
+ POWERPC_FLAG_PMM)
static void init_proc_7x0 (CPUPPCState *env)
{
/* PowerPC 750FX/GX */
#define POWERPC_INSNS_750fx (POWERPC_INSNS_WORKS | PPC_EXTERN)
-#define POWERPC_MSRM_750fx (0x000000000007FF77ULL)
+#define POWERPC_MSRM_750fx (0x000000000005FF77ULL)
#define POWERPC_MMU_750fx (POWERPC_MMU_32B)
#define POWERPC_EXCP_750fx (POWERPC_EXCP_7x0)
#define POWERPC_INPUT_750fx (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_750fx (bfd_mach_ppc_750)
-#define POWERPC_FLAG_750fx (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_750fx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
+ POWERPC_FLAG_PMM)
static void init_proc_750fx (CPUPPCState *env)
{
/* PowerPC 745/755 */
#define POWERPC_INSNS_7x5 (POWERPC_INSNS_WORKS | PPC_EXTERN | PPC_6xx_TLB)
-#define POWERPC_MSRM_7x5 (0x000000000007FF77ULL)
+#define POWERPC_MSRM_7x5 (0x000000000005FF77ULL)
#define POWERPC_MMU_7x5 (POWERPC_MMU_SOFT_6xx)
//#define POWERPC_EXCP_7x5 (POWERPC_EXCP_7x5)
#define POWERPC_INPUT_7x5 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7x5 (bfd_mach_ppc_750)
-#define POWERPC_FLAG_7x5 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_7x5 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
+ POWERPC_FLAG_PMM)
static void init_proc_7x5 (CPUPPCState *env)
{
#define POWERPC_EXCP_7400 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7400 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7400 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
static void init_proc_7400 (CPUPPCState *env)
{
#define POWERPC_EXCP_7410 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7410 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7410 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
static void init_proc_7410 (CPUPPCState *env)
{
#define POWERPC_EXCP_7440 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7440 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
__attribute__ (( unused ))
static void init_proc_7440 (CPUPPCState *env)
#define POWERPC_EXCP_7450 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7450 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
__attribute__ (( unused ))
static void init_proc_7450 (CPUPPCState *env)
#define POWERPC_EXCP_7445 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7445 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
__attribute__ (( unused ))
static void init_proc_7445 (CPUPPCState *env)
#define POWERPC_EXCP_7455 (POWERPC_EXCP_74xx)
#define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx)
#define POWERPC_BFDM_7455 (bfd_mach_ppc_7400)
-#define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
__attribute__ (( unused ))
static void init_proc_7455 (CPUPPCState *env)
//#define POWERPC_EXCP_970 (POWERPC_EXCP_970)
#define POWERPC_INPUT_970 (PPC_FLAGS_INPUT_970)
#define POWERPC_BFDM_970 (bfd_mach_ppc64)
-#define POWERPC_FLAG_970 (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_970 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
#if defined(CONFIG_USER_ONLY)
#define POWERPC970_HID5_INIT 0x00000080
#define POWERPC_EXCP_970FX (POWERPC_EXCP_970)
#define POWERPC_INPUT_970FX (PPC_FLAGS_INPUT_970)
#define POWERPC_BFDM_970FX (bfd_mach_ppc64)
-#define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
static void init_proc_970FX (CPUPPCState *env)
{
#define POWERPC_EXCP_970GX (POWERPC_EXCP_970)
#define POWERPC_INPUT_970GX (PPC_FLAGS_INPUT_970)
#define POWERPC_BFDM_970GX (bfd_mach_ppc64)
-#define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE)
+#define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
+ POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
static void init_proc_970GX (CPUPPCState *env)
{
#define POWERPC_EXCP_620 (POWERPC_EXCP_970)
#define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970)
#define POWERPC_BFDM_620 (bfd_mach_ppc64)
-#define POWERPC_FLAG_620 (POWERPC_FLAG_NONE)
+#define POWERPC_FLAG_620 (POWERPC_FLAG_SE | POWERPC_FLAG_BE)
__attribute__ (( unused ))
static void init_proc_620 (CPUPPCState *env)
def->pvr);
/* PowerPC implementation specific initialisations (SPRs, timers, ...) */
(*def->init_proc)(env);
+ /* MSR bits & flags consistency checks */
+ if (env->msr_mask & (1 << 25)) {
+ switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
+ case POWERPC_FLAG_SPE:
+ case POWERPC_FLAG_VRE:
+ break;
+ default:
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should define POWERPC_FLAG_SPE or POWERPC_FLAG_VRE\n");
+ exit(1);
+ }
+ } else if (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should not define POWERPC_FLAG_SPE nor POWERPC_FLAG_VRE\n");
+ exit(1);
+ }
+ if (env->msr_mask & (1 << 17)) {
+ switch (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
+ case POWERPC_FLAG_TGPR:
+ case POWERPC_FLAG_CE:
+ break;
+ default:
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should define POWERPC_FLAG_TGPR or POWERPC_FLAG_CE\n");
+ exit(1);
+ }
+ } else if (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should not define POWERPC_FLAG_TGPR nor POWERPC_FLAG_CE\n");
+ exit(1);
+ }
+ if (env->msr_mask & (1 << 10)) {
+ switch (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
+ POWERPC_FLAG_UBLE)) {
+ case POWERPC_FLAG_SE:
+ case POWERPC_FLAG_DWE:
+ case POWERPC_FLAG_UBLE:
+ break;
+ default:
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should define POWERPC_FLAG_SE or POWERPC_FLAG_DWE or "
+ "POWERPC_FLAG_UBLE\n");
+ exit(1);
+ }
+ } else if (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
+ POWERPC_FLAG_UBLE)) {
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should not define POWERPC_FLAG_SE nor POWERPC_FLAG_DWE nor "
+ "POWERPC_FLAG_UBLE\n");
+ exit(1);
+ }
+ if (env->msr_mask & (1 << 9)) {
+ switch (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
+ case POWERPC_FLAG_BE:
+ case POWERPC_FLAG_DE:
+ break;
+ default:
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should define POWERPC_FLAG_BE or POWERPC_FLAG_DE\n");
+ exit(1);
+ }
+ } else if (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should not define POWERPC_FLAG_BE nor POWERPC_FLAG_DE\n");
+ exit(1);
+ }
+ if (env->msr_mask & (1 << 2)) {
+ switch (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
+ case POWERPC_FLAG_PX:
+ case POWERPC_FLAG_PMM:
+ break;
+ default:
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should define POWERPC_FLAG_PX or POWERPC_FLAG_PMM\n");
+ exit(1);
+ }
+ } else if (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
+ fprintf(stderr, "PowerPC MSR definition inconsistency\n"
+ "Should not define POWERPC_FLAG_PX nor POWERPC_FLAG_PMM\n");
+ exit(1);
+ }
/* Allocate TLBs buffer when needed */
#if !defined(CONFIG_USER_ONLY)
if (env->nb_tlb != 0) {
}
#if defined(PPC_DUMP_CPU)
-static int dump_ppc_insns (CPUPPCState *env)
+static void dump_ppc_insns (CPUPPCState *env)
{
opc_handler_t **table, *handler;
uint8_t opc1, opc2, opc3;
printf(" Exceptions model : %s\n"
" Bus model : %s\n",
excp_model, bus_model);
+ printf(" MSR features :\n");
+ if (env->flags & POWERPC_FLAG_SPE)
+ printf(" signal processing engine enable"
+ "\n");
+ else if (env->flags & POWERPC_FLAG_VRE)
+ printf(" vector processor enable\n");
+ if (env->flags & POWERPC_FLAG_TGPR)
+ printf(" temporary GPRs\n");
+ else if (env->flags & POWERPC_FLAG_CE)
+ printf(" critical input enable\n");
+ if (env->flags & POWERPC_FLAG_SE)
+ printf(" single-step trace mode\n");
+ else if (env->flags & POWERPC_FLAG_DWE)
+ printf(" debug wait enable\n");
+ else if (env->flags & POWERPC_FLAG_UBLE)
+ printf(" user BTB lock enable\n");
+ if (env->flags & POWERPC_FLAG_BE)
+ printf(" branch-step trace mode\n");
+ else if (env->flags & POWERPC_FLAG_DE)
+ printf(" debug interrupt enable\n");
+ if (env->flags & POWERPC_FLAG_PX)
+ printf(" inclusive protection\n");
+ else if (env->flags & POWERPC_FLAG_PMM)
+ printf(" performance monitor mark\n");
+ if (env->flags == POWERPC_FLAG_NONE)
+ printf(" none\n");
}
dump_ppc_insns(env);
dump_ppc_sprs(env);
projects / qemu-xen-3.3-testing.git / commitdiff