]> xenbits.xensource.com Git - qemu-xen.git/commitdiff
ppc/pnv: change the PowerNV machine devices to be non user creatable
authorCédric Le Goater <clg@kaod.org>
Wed, 29 Jan 2020 11:37:20 +0000 (12:37 +0100)
committerDavid Gibson <david@gibson.dropbear.id.au>
Sun, 2 Feb 2020 03:07:57 +0000 (14:07 +1100)
The PowerNV machine emulates an OpenPOWER system and the PowerNV chip
devices are models of the internal logic of the POWER processor. They
can not be instantiated by the user on the QEMU command line.

The PHB3/PHB4 devices could be an exception in the future after some
rework on how the device tree is built. For the moment, exclude them
also.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200129113720.7404-1-clg@kaod.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
hw/pci-host/pnv_phb3.c
hw/pci-host/pnv_phb3_pbcq.c
hw/pci-host/pnv_phb4.c
hw/pci-host/pnv_phb4_pec.c
hw/ppc/pnv_core.c
hw/ppc/pnv_homer.c
hw/ppc/pnv_lpc.c
hw/ppc/pnv_occ.c

index f03399c40615328de64949e6492154beeb1a4a54..74618fadf0858cfb85aa56d8e85a640f63920f5a 100644 (file)
@@ -1115,6 +1115,7 @@ static void pnv_phb3_class_init(ObjectClass *klass, void *data)
     dc->realize = pnv_phb3_realize;
     device_class_set_props(dc, pnv_phb3_properties);
     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_phb3_type_info = {
@@ -1168,6 +1169,7 @@ static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data)
 
     device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
                                     &rpc->parent_realize);
+    dc->user_creatable = false;
 
     k->vendor_id = PCI_VENDOR_ID_IBM;
     k->device_id = 0x03dc;
index 6f0c05be682a281afc20f1db55243770e5d7ece0..f232228b0e28731433088532ac26b02b7679e079 100644 (file)
@@ -335,6 +335,7 @@ static void pnv_pbcq_class_init(ObjectClass *klass, void *data)
     xdc->dt_xscom = pnv_pbcq_dt_xscom;
 
     dc->realize = pnv_pbcq_realize;
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_pbcq_type_info = {
index 61235d13a696c1ff3884ad9f99b9b2cbfb3e0027..23cf093928edd0bdac41fe4ab4bbd5c08a08d97d 100644 (file)
@@ -1290,7 +1290,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, void *data)
     dc->realize         = pnv_phb4_realize;
     device_class_set_props(dc, pnv_phb4_properties);
     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
-    dc->user_creatable  = true;
+    dc->user_creatable  = false;
     dc->reset           = pnv_phb4_reset;
 
     xfc->notify         = pnv_phb4_xive_notify;
@@ -1368,6 +1368,7 @@ static void pnv_phb4_root_port_class_init(ObjectClass *klass, void *data)
     PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
 
     dc->desc     = "IBM PHB4 PCIE Root Port";
+    dc->user_creatable = false;
 
     device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
                                     &rpc->parent_realize);
index fd92041d69dc72598ba83561cfc7b3e5c71b7f2f..68e1db3eac4ffb54f79a2c80dc186020392ef9ff 100644 (file)
@@ -490,6 +490,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void *data)
 
     dc->realize = pnv_pec_realize;
     device_class_set_props(dc, pnv_pec_properties);
+    dc->user_creatable = false;
 
     pecc->xscom_nest_base = pnv_pec_xscom_nest_base;
     pecc->xscom_pci_base  = pnv_pec_xscom_pci_base;
@@ -568,6 +569,7 @@ static void pnv_pec_stk_class_init(ObjectClass *klass, void *data)
 
     device_class_set_props(dc, pnv_pec_stk_properties);
     dc->realize = pnv_pec_stk_realize;
+    dc->user_creatable = false;
 
     /* TODO: reset regs ? */
 }
index f7247222bceb713253fadf5a1a4c66b6fef65230..234562040de35ef4a4e60bff6dfbb2c9bf9eb680 100644 (file)
@@ -325,6 +325,7 @@ static void pnv_core_class_init(ObjectClass *oc, void *data)
     dc->realize = pnv_core_realize;
     dc->unrealize = pnv_core_unrealize;
     device_class_set_props(dc, pnv_core_properties);
+    dc->user_creatable = false;
 }
 
 #define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
@@ -423,6 +424,7 @@ static void pnv_quad_class_init(ObjectClass *oc, void *data)
 
     dc->realize = pnv_quad_realize;
     device_class_set_props(dc, pnv_quad_properties);
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_quad_info = {
index 93ae42f7e4d1e0c8e83f0e094bbd9e2921f93d39..9a262629b73a4476056ec4f6a5bbb362a3e8ae69 100644 (file)
@@ -360,6 +360,7 @@ static void pnv_homer_class_init(ObjectClass *klass, void *data)
     dc->realize = pnv_homer_realize;
     dc->desc = "PowerNV HOMER Memory";
     device_class_set_props(dc, pnv_homer_properties);
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_homer_type_info = {
index d1de98f04c08424ee1814d62f64e3c1f639a13b9..5989d723c50ce16f8b756937ec25c59eacad3e7a 100644 (file)
@@ -762,6 +762,7 @@ static void pnv_lpc_class_init(ObjectClass *klass, void *data)
     dc->realize = pnv_lpc_realize;
     dc->desc = "PowerNV LPC Controller";
     device_class_set_props(dc, pnv_lpc_properties);
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_lpc_info = {
index 2173fac0e79868599f7e725eae5a6ca1e32ea44a..5a716c256edc6522f90b9a3fa15d0ab637a6184e 100644 (file)
@@ -280,6 +280,7 @@ static void pnv_occ_class_init(ObjectClass *klass, void *data)
     dc->realize = pnv_occ_realize;
     dc->desc = "PowerNV OCC Controller";
     device_class_set_props(dc, pnv_occ_properties);
+    dc->user_creatable = false;
 }
 
 static const TypeInfo pnv_occ_type_info = {