]> xenbits.xensource.com Git - people/royger/xen.git/commitdiff
VMX/cpu-policy: check availability of RDTSCP and INVPCID
authorJan Beulich <jbeulich@suse.com>
Tue, 30 May 2023 09:54:55 +0000 (11:54 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 30 May 2023 09:54:55 +0000 (11:54 +0200)
Both have separate enable bits, which are optional. While on real
hardware we can perhaps expect these VMX controls to be available if
(and only if) the base CPU feature is available, when running
virtualized ourselves this may not be the case.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
xen/arch/x86/cpu-policy.c
xen/arch/x86/include/asm/hvm/vmx/vmcs.h

index 74266d30b55173af53f96869b8bd1ae4789fdddb..fbf0ecb7cc98bef4387a8fd83b80af3e9d615f23 100644 (file)
@@ -600,6 +600,12 @@ static void __init calculate_hvm_max_policy(void)
      */
     if ( cpu_has_vmx )
     {
+        if ( !cpu_has_vmx_rdtscp )
+            __clear_bit(X86_FEATURE_RDTSCP, fs);
+
+        if ( !cpu_has_vmx_invpcid )
+            __clear_bit(X86_FEATURE_INVPCID, fs);
+
         if ( !cpu_has_vmx_mpx )
             __clear_bit(X86_FEATURE_MPX, fs);
 
index 51641caa9fd35d935c61303aea79e341e7ff263a..d07fcb2bc9294a2de6539e065fbdbc64e28b3a25 100644 (file)
@@ -299,6 +299,8 @@ extern u64 vmx_ept_vpid_cap;
     (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT)
 #define cpu_has_vmx_dt_exiting \
     (vmx_secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING)
+#define cpu_has_vmx_rdtscp \
+    (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP)
 #define cpu_has_vmx_vpid \
     (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID)
 #define cpu_has_monitor_trap_flag \
@@ -314,6 +316,8 @@ extern u64 vmx_ept_vpid_cap;
      SECONDARY_EXEC_UNRESTRICTED_GUEST)
 #define cpu_has_vmx_ple \
     (vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
+#define cpu_has_vmx_invpcid \
+    (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID)
 #define cpu_has_vmx_apic_reg_virt \
     (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT)
 #define cpu_has_vmx_virtual_intr_delivery \