{
paddr_t bank_start, bank_size, bank_end;
- uint64_t mask = pdx_init_mask(bootinfo.mem.bank[0].start);
+ /*
+ * Arm does not have any restrictions on the bits to compress. Pass 0 to
+ * let the common code further restrict the mask.
+ *
+ * If the logic changes in pfn_pdx_hole_setup we might have to
+ * update this function too.
+ */
+ uint64_t mask = pdx_init_mask(0x0);
int bank;
for ( bank = 0 ; bank < bootinfo.mem.nr_banks; bank++ )
return mask;
}
+/* We don't want to compress the low MAX_ORDER bits of the addresses. */
uint64_t __init pdx_init_mask(uint64_t base_addr)
{
- return fill_mask(base_addr - 1);
+ return fill_mask(max(base_addr,
+ (uint64_t)1 << (MAX_ORDER + PAGE_SHIFT)) - 1);
}
u64 __init pdx_region_mask(u64 base, u64 len)
* This guarantees that page-pointer arithmetic remains valid within
* contiguous aligned ranges of 2^MAX_ORDER pages. Among others, our
* buddy allocator relies on this assumption.
+ *
+ * If the logic changes here, we might have to update the ARM specific
+ * init_pdx too.
*/
for ( j = MAX_ORDER-1; ; )
{