]> xenbits.xensource.com Git - xen.git/commitdiff
xen/arm: hsr_iabt: Document RES0 field
authorJulien Grall <julien.grall@arm.com>
Tue, 12 Sep 2017 10:03:11 +0000 (11:03 +0100)
committerStefano Stabellini <sstabellini@kernel.org>
Wed, 20 Sep 2017 00:17:03 +0000 (17:17 -0700)
Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
xen/include/asm-arm/processor.h

index cd45e5f48f6ad53f904bd14f461bfc2b5326d8a6..c0b4c3d1c9b57a31d35de7bd9083a8e37cc84605 100644 (file)
@@ -581,9 +581,9 @@ union hsr {
 
     struct hsr_iabt {
         unsigned long ifsc:6;  /* Instruction fault status code */
-        unsigned long res0:1;
+        unsigned long res0:1;  /* RES0 */
         unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
-        unsigned long res1:1;
+        unsigned long res1:1;  /* RES0 */
         unsigned long eat:1;   /* External abort type */
         unsigned long res2:15;
         unsigned long len:1;   /* Instruction length */