x86: fix boot-time watchdog test.

Since the perf counter that the LAPIC NMI watchdog uses only
runs while the core isn't halted, and all APs are idle at
this point in the boot process, it's possible that remote
CPUs won't see any NMIs during the 10-tick waiting period.
Force all CPUs to busy-wait so we know the timers are running.

Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
xen-unstable changeset:   23612:6c7a23e08a04
xen-unstable date:        Tue Jun 28 09:16:13 2011 +0100

diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c
index 77447107a01231435f4264a3a671a0aec653d08b..c08f4303cd33f2d033f00377c3ca7515b5fb0e53 100644 (file)
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -94,6 +94,11 @@ int nmi_active;
     (P4_CCCR_OVF_PMI0|P4_CCCR_THRESHOLD(15)|P4_CCCR_COMPLEMENT| \
      P4_CCCR_COMPARE|P4_CCCR_REQUIRED|P4_CCCR_ESCR_SELECT(4)|P4_CCCR_ENABLE)
 
+static void __init wait_for_nmis(void *p)
+{
+    mdelay((10*1000)/nmi_hz); /* wait 10 ticks */
+}
+
 int __init check_nmi_watchdog (void)
 {
     static unsigned int __initdata prev_nmi_count[NR_CPUS];
@@ -107,7 +112,12 @@ int __init check_nmi_watchdog (void)
     for ( cpu = 0; cpu < NR_CPUS; cpu++ ) 
         prev_nmi_count[cpu] = nmi_count(cpu);
     local_irq_enable();
-    mdelay((10*1000)/nmi_hz); /* wait 10 ticks */
+
+    /* Wait for 10 ticks.  Busy-wait on all CPUs: the LAPIC counter that
+     * the NMI watchdog uses only runs while the core's not halted */
+    if ( nmi_watchdog == NMI_LOCAL_APIC )
+        smp_call_function(wait_for_nmis, NULL, 0);
+    wait_for_nmis(NULL);
 
     for ( cpu = 0; cpu < NR_CPUS; cpu++ ) 
     {