]> xenbits.xensource.com Git - xen.git/commitdiff
x86/msr: fix handling of MSR_IA32_PERF_{STATUS/CTL} (again, part 2)
authorJan Beulich <jbeulich@suse.com>
Fri, 5 Feb 2021 07:54:03 +0000 (08:54 +0100)
committerJan Beulich <jbeulich@suse.com>
Fri, 5 Feb 2021 07:54:03 +0000 (08:54 +0100)
X86_VENDOR_* aren't bit masks in the older trees.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/msr.c

index 1afb80427c2172c59cbfadeec08287d51802b39f..c028fbdcf454dd4e7592070142ef86bdcfaf279f 100644 (file)
@@ -393,7 +393,8 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * a cpufreq controller dom0 which has full access.
          */
     case MSR_IA32_PERF_CTL:
-        if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) )
+        if ( cp->x86_vendor != X86_VENDOR_INTEL &&
+             cp->x86_vendor != X86_VENDOR_CENTAUR )
             goto gp_fault;
 
         if ( likely(!is_cpufreq_controller(d)) || wrmsr_safe(msr, val) == 0 )