xen/arm: Flush TLBs before turning on the MMU to avoid stale entries

We don't know what is the state of the TLBs when booting Xen. To avoid
stale entries, it is necessary to flush the TLBs before turning on the
MMU.

Reported-by: Iain Hunter <iain@hunterembedded.co.uk>
Signed-off-by: Julien Grall <julien.gralL@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 43374e77c60f6e99208e5b993231c9a29ee6d480..612fc8fc3c790b19645997913b057c3cb7924c9a 100644 (file)
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -360,6 +360,13 @@ virtphys_clash:
 1:
         PRINT("- Turning on paging -\r\n")
 
+        /*
+         * The state of the TLBs is unknown before turning on the MMU.
+         * Flush them to avoid stale one.
+         */
+        mcr   CP32(r0, TLBIALLH)     /* Flush hypervisor TLBs */
+        dsb   nsh
+
         ldr   r1, =paging            /* Explicit vaddr, not RIP-relative */
         mrc   CP32(r0, HSCTLR)
         orr   r0, r0, #(SCTLR_M|SCTLR_C) /* Enable MMU and D-cache */

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index fa0ef7034c55a05174f69cbd4d64add32ccdeda6..90532776bd40468f9b2d749bd5793a5164ef0fbe 100644 (file)
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -502,6 +502,13 @@ virtphys_clash:
 1:
         PRINT("- Turning on paging -\r\n")
 
+        /*
+         * The state of the TLBs is unknown before turning on the MMU.
+         * Flush them to avoid stale one.
+         */
+        tlbi  alle2                  /* Flush hypervisor TLBs */
+        dsb   nsh
+
         ldr   x1, =paging            /* Explicit vaddr, not RIP-relative */
         mrs   x0, SCTLR_EL2
         orr   x0, x0, #SCTLR_M       /* Enable MMU */