x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2

The Hygon Dhyana CPU supports the MSR way to get TOP_MEM2. So add Hygon
Dhyana support to print the value of TOP_MEM2.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Acked-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index 8f9cf1b1d7557f43b84a22adaaa70ceb7d5fd756..94ee7d61ad5f48dcb7dd288d95de7d37451b89c9 100644 (file)
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -217,8 +217,9 @@ static void __init print_mtrr_state(const char *level)
                        printk("%s  %u disabled\n", level, i);
        }
 
-       if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD
-           && boot_cpu_data.x86 >= 0xf) {
+       if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+            boot_cpu_data.x86 >= 0xf) ||
+            boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
                uint64_t syscfg, tom2;
 
                rdmsrl(MSR_K8_SYSCFG, syscfg);