[SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
xen-unstable changeset:   19354:4fd39881f9f185b49cd1e007b550b9ccab10d139
xen-unstable date:        Fri Mar 13 07:45:11 2009 +0000

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 545263270c173158a5f5386056df1bdaf797941d..3328e9facd39f4f482ddb85aa8f1976534571dc5 100644 (file)
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1767,6 +1767,15 @@ int hvm_msr_read_intercept(struct cpu_user_regs *regs)
         msr_content = var_range_base[index];
         break;
 
+    case MSR_K8_ENABLE_C1E:
+         /* There's no point in letting the guest see C-States.
+          * Further, this AMD-only register may be accessed if this HVM guest
+          * has been migrated to an Intel host. This fixes a guest crash
+          * in this case.
+          */
+         msr_content = 0;
+         break;
+
     default:
         return hvm_funcs.msr_read_intercept(regs);
     }