--- /dev/null
+diff --git a/console.h b/console.h
+index 8c9b09b..def586a 100644
+--- a/console.h
++++ b/console.h
+@@ -295,7 +295,6 @@ void vga_hw_screen_dump(const char *filename);
+ void unset_vga_acc(void);
+ void set_vga_acc(void);
+ extern uint32_t guest_framebuffer;
+-extern int intel_output;
+
+ int is_graphic_console(void);
+ int is_fixedsize_console(void);
+diff --git a/hw/vga.c b/hw/vga.c
+index a2b8744..66f77b0 100644
+--- a/hw/vga.c
++++ b/hw/vga.c
+@@ -34,6 +34,8 @@
+
+ #include "qemu-timer.h"
+
++#include "intel.h"
++
+ //#define DEBUG_VGA
+ //#define DEBUG_VGA_MEM
+ //#define DEBUG_VGA_REG
+@@ -572,6 +574,7 @@ static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
+ #ifdef DEBUG_BOCHS_VBE
+ printf("VBE: read index=0x%x val=0x%x\n", s->vbe_index, val);
+ #endif
++ fprintf(stderr,"VBE: getcaps=%x read index=0x%x val=0x%x\n", s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS, s->vbe_index, val);
+ return val;
+ }
+
+@@ -631,7 +634,9 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
+ !(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) {
+ int h, shift_control;
+
+- if (s->vram_gmfn != s->lfb_addr && intel_output != 1) {
++ /* If framebuffer memory isn't mapped over the real frame buffer,
++ * dom0 needs to be able to see it */
++ if (s->vram_gmfn != s->lfb_addr && intel_output != INTEL_OUTPUT_MAPPED) {
+ set_vram_mapping(s, s->lfb_addr, s->lfb_end);
+ }
+
+@@ -1686,7 +1691,8 @@ static void vga_draw_graphic(VGAState *s, int full_update)
+ }
+ }
+
+- if (intel_output == 1 && is_buffer_shared(s->ds->surface))
++ /* If it's a real frame buffer don't bother with the update tracking nonsense */
++ if (intel_output == INTEL_OUTPUT_MAPPED && is_buffer_shared(s->ds->surface))
+ return;
+
+ vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
+@@ -2341,6 +2347,10 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
+ #endif
+
+ fprintf(stderr, "vga s->lfb_addr = %lx s->lfb_end = %lx \n", (unsigned long) s->lfb_addr,(unsigned long) s->lfb_end);
++ fprintf(stderr, "vbe regs VBE_DISPI_INDEX_VIDEO_MEMORY_64K=%d VBE_DISPI_INDEX_XRES=%d VBE_DISPI_INDEX_BPP=%d\n",
++ s->vbe_regs[VBE_DISPI_INDEX_VIDEO_MEMORY_64K],
++ s->vbe_regs[VBE_DISPI_INDEX_XRES],
++ s->vbe_regs[VBE_DISPI_INDEX_BPP]);
+
+ if (size != s->vram_size)
+ fprintf(stderr, "vga map with size %x != %x\n", size, s->vram_size);
+diff --git a/intel.c b/intel.c
+index df9ebf7..0f0bfde 100644
+--- a/intel.c
++++ b/intel.c
+@@ -14,31 +14,15 @@
+ #include "console.h"
+ #include "sysemu.h"
+
++#include "intel_reg.h"
++#include "intel.h"
++
+ #define INTEL_DEBUG(format, args...) \
+ fprintf (stderr, "intel.c:%d:%s " format , __LINE__, __func__, ## args);
+
+-#define TileW 128
+-#define TileH 8
+-
+-#define REG_DR_DSPASURF 0x7019C
+-#define REG_DR_DSPACNTR 0x70180
+-#define REG_DR_DSPASTRIDE 0x70188
+-#define REG_DR_PIPEACONF 0x70008
+-
+-#define REG_DR_DSPBSURF 0x7119C
+-#define REG_DR_DSPBCNTR 0x71180
+-#define REG_DR_DSPBSTRIDE 0x71188
+-#define REG_DR_PIPEBCONF 0x71008
+-
+-#define REG_DE_PIPEASRC 0x6001c
+-#define REG_DE_PIPEBSRC 0x6101c
+-
+-#define REG_FBC_CONTROL 0x03208
+-#define REG_FBC_STATUS 0x03210
+-
+ extern int vga_passthrough;
+ uint32_t guest_framebuffer;
+-int intel_output;
++int intel_output = INTEL_OUTPUT_UNDEF;
+ static int display = 0;
+
+ static int mmio_fd = -1;
+@@ -284,7 +268,7 @@ static void intel_resize(DisplayState *ds)
+ intel_force_linear(ds_get_linesize(ds));
+ set_fb_mapping();
+ }
+- intel_output = 1;
++ intel_output = INTEL_OUTPUT_MAPPED;
+ }
+ else
+ {
+@@ -292,12 +276,12 @@ static void intel_resize(DisplayState *ds)
+ unset_fb_mapping();
+ else
+ intel_force_linear(0);
+- intel_output = 2;
++ intel_output = INTEL_OUTPUT_BLITTED;
+ }
+ } else {
+ if (map_size)
+ unset_fb_mapping();
+- intel_output = 1;
++ intel_output = INTEL_OUTPUT_MAPPED;
+ }
+ }
+
+@@ -512,6 +496,6 @@ void intel_display_init(DisplayState *ds)
+ dpy_resize(ds);
+ }
+
+- intel_output = 1;
++ intel_output = INTEL_OUTPUT_BLITTED;
+ lds = ds;
+ }
+diff --git a/intel.h b/intel.h
+new file mode 100644
+index 0000000..25086be
+--- /dev/null
++++ b/intel.h
+@@ -0,0 +1,5 @@
++extern int intel_output;
++#define INTEL_OUTPUT_UNDEF 0
++#define INTEL_OUTPUT_MAPPED 1
++#define INTEL_OUTPUT_BLITTED 2
++
+diff --git a/intel_reg.h b/intel_reg.h
+new file mode 100644
+index 0000000..cd7855e
+--- /dev/null
++++ b/intel_reg.h
+@@ -0,0 +1,22 @@
++
++#define TileW 128
++#define TileH 8
++
++#define REG_DR_DSPASURF 0x7019C
++#define REG_DR_DSPACNTR 0x70180
++#define REG_DR_DSPASTRIDE 0x70188
++#define REG_DR_PIPEACONF 0x70008
++
++#define REG_DR_DSPBSURF 0x7119C
++#define REG_DR_DSPBCNTR 0x71180
++#define REG_DR_DSPBSTRIDE 0x71188
++#define REG_DR_PIPEBCONF 0x71008
++
++#define REG_DE_PIPEASRC 0x6001c
++#define REG_DE_PIPEBSRC 0x6101c
++
++#define REG_FBC_CONTROL 0x03208
++#define REG_FBC_STATUS 0x03210
++
++
++