x86: blacklist new AMD CPUID bits for PV domains

there are some new CPUID bits (and leaves) which Dom0 and PV domains
should not see to avoid trouble, since we don't emulate the features.
The most prominent one is a topology leaf, which contains information
specific to the physical CPU, not the virtual one. To avoid confusion
(and possibly crashes) due to a confused Dom0 scheduler simply disable
these bits.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Keir Fraser <keir@xen.org>

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 724ed0f1249e24edb016c58de1cc50ae4216251b..407a53543f34500b6124f28b3d58ba55ff891773 100644 (file)
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -427,12 +427,17 @@ static void xc_cpuid_pv_policy(
         clear_bit(X86_FEATURE_IBS, regs[2]);
         clear_bit(X86_FEATURE_SKINIT, regs[2]);
         clear_bit(X86_FEATURE_WDT, regs[2]);
+        clear_bit(X86_FEATURE_LWP, regs[2]);
+        clear_bit(X86_FEATURE_NODEID_MSR, regs[2]);
+        clear_bit(X86_FEATURE_TOPOEXT, regs[2]);
         break;
     case 5: /* MONITOR/MWAIT */
     case 0xa: /* Architectural Performance Monitor Features */
     case 0xd: /* XSAVE */
     case 0x8000000a: /* SVM revision and features */
     case 0x8000001b: /* Instruction Based Sampling */
+    case 0x8000001c: /* Light Weight Profiling */
+    case 0x8000001e: /* Extended topology reporting */
         regs[0] = regs[1] = regs[2] = regs[3] = 0;
         break;
     }

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 75d305fa6d389bcacfb60392ac7873a241471eb6..97e3dc4a407fc48b3ed74733be989efe9f43f4c9 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -802,11 +802,16 @@ static void pv_cpuid(struct cpu_user_regs *regs)
         __clear_bit(X86_FEATURE_IBS % 32, &c);
         __clear_bit(X86_FEATURE_SKINIT % 32, &c);
         __clear_bit(X86_FEATURE_WDT % 32, &c);
+        __clear_bit(X86_FEATURE_LWP % 32, &c);
+        __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
+        __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
         break;
     case 5: /* MONITOR/MWAIT */
     case 0xa: /* Architectural Performance Monitor Features */
     case 0x8000000a: /* SVM revision and features */
     case 0x8000001b: /* Instruction Based Sampling */
+    case 0x8000001c: /* Light Weight Profiling */
+    case 0x8000001e: /* Extended topology reporting */
         a = b = c = d = 0;
         break;
     default: