x86/apic: include the LDR when clearing out APIC registers

Although APIC initialization will typically clear out the LDR before
setting it, the APIC cleanup code should reset the LDR.

This was discovered with a 32-bit KVM guest jumping into a kdump
kernel. The stale bits in the LDR triggered a bug in the KVM APIC
implementation which caused the destination mapping for VCPUs to be
corrupted.

Note that this isn't intended to paper over the KVM APIC bug. The kernel
has to clear the LDR when resetting the APIC registers except when X2APIC
is enabled.

Signed-off-by: Bandan Das <bsd@redhat.com>
[Linux commit 558682b5291937a70748d36fd9ba757fb25b99ae]
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index c886b0a2d1dde0bc81c09d7301f8f148c2971fd0..ea0d561f9df18fe77fcc9023f20e7f35737039b1 100644 (file)
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -212,6 +212,10 @@ void clear_local_APIC(void)
         apic_write(APIC_LVTTHMR, APIC_LVT_MASKED);
     if (maxlvt >= 6)
         apic_write(APIC_CMCI, APIC_LVT_MASKED);
+    if (!x2apic_enabled) {
+        v = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        apic_write(APIC_LDR, v);
+    }
 
     if (maxlvt > 3)        /* Due to Pentium errata 3AP and 11AP. */
         apic_write(APIC_ESR, 0);