x86: Split out new msr.h header

Move the {rd,wr}msr wrappers from lib.h and bitfield unions from msr-index.h
to here, leaving msr-index.h to be purely name definitions.

Correct an XFT typo in the msr-index.h header guards, and include msr.h in
arch/xtf.h to avoid tests needing to include msr-index.h manually

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff --git a/arch/x86/include/arch/lib.h b/arch/x86/include/arch/lib.h
index 82eb7da600c4f98ba8e2cb6cfcc8c03fb0ef4f22..6714bdcf7d49dc20a277d419a0d88cd6f4349d42 100644 (file)
--- a/arch/x86/include/arch/lib.h
+++ b/arch/x86/include/arch/lib.h
@@ -5,53 +5,7 @@
 #include <xtf/extable.h>
 #include <xen/arch-x86/xen.h>
 #include <arch/desc.h>
-
-static inline uint64_t rdmsr(uint32_t idx)
-{
-    uint32_t lo, hi;
-
-    asm volatile("rdmsr": "=a" (lo), "=d" (hi): "c" (idx));
-
-    return (((uint64_t)hi) << 32) | lo;
-}
-
-static inline bool rdmsr_safe(uint32_t idx, uint64_t *val)
-{
-    uint32_t lo, hi, new_idx;
-
-    asm volatile("1: rdmsr; 2:"
-                 _ASM_EXTABLE_HANDLER(1b, 2b, ex_rdmsr_safe)
-                 : "=a" (lo), "=d" (hi), "=c" (new_idx)
-                 : "c" (idx), "X" (ex_rdmsr_safe));
-
-    bool fault = idx != new_idx;
-
-    if ( !fault )
-        *val = (((uint64_t)hi) << 32) | lo;
-
-    return fault;
-}
-
-static inline void wrmsr(uint32_t idx, uint64_t val)
-{
-    asm volatile ("wrmsr":
-                  : "c" (idx), "a" ((uint32_t)val),
-                    "d" ((uint32_t)(val >> 32)));
-}
-
-static inline bool wrmsr_safe(uint32_t idx, uint64_t val)
-{
-    uint32_t new_idx;
-
-    asm volatile ("1: wrmsr; 2:"
-                  _ASM_EXTABLE_HANDLER(1b, 2b, ex_wrmsr_safe)
-                  : "=c" (new_idx)
-                  : "c" (idx), "a" ((uint32_t)val),
-                    "d" ((uint32_t)(val >> 32)),
-                    "X" (ex_wrmsr_safe));
-
-    return idx != new_idx;
-}
+#include <arch/msr.h>
 
 static inline void cpuid(uint32_t leaf,
                          uint32_t *eax, uint32_t *ebx,

diff --git a/arch/x86/include/arch/msr-index.h b/arch/x86/include/arch/msr-index.h
index d5cf57ffa8b97235e4aa29a70f3c44ca3f49d25b..6e7e144638ccfd16844346f9779035e949c66505 100644 (file)
--- a/arch/x86/include/arch/msr-index.h
+++ b/arch/x86/include/arch/msr-index.h
@@ -1,5 +1,10 @@
-#ifndef XFT_X86_MSR_INDEX_H
-#define XFT_X86_MSR_INDEX_H
+/**
+ * @file arch/x86/include/arch/msr.h
+ *
+ * Model Specific Register mnemonics and bit definitions.
+ */
+#ifndef XTF_X86_MSR_INDEX_H
+#define XTF_X86_MSR_INDEX_H
 
 #include <xtf/numbers.h>
 
@@ -66,35 +71,7 @@
 #define MSR_GS_BASE                     0xc0000101
 #define MSR_SHADOW_GS_BASE              0xc0000102
 
-#ifndef __ASSEMBLY__
-#include <xtf/types.h>
-
-typedef union msr_feature_control {
-    uint64_t raw;
-    struct {
-        bool lock:1,
-            vmxon_inside_smx:1,
-            vmxon_outside_smx:1;
-    };
-} msr_feature_control_t;
-
-typedef union msr_vmx_basic {
-    uint64_t raw;
-    struct {
-        uint32_t      vmcs_rev_id:31;
-        bool                  mbz:1;
-        uint32_t        vmcs_size:13;
-        uint32_t                 :3;
-        bool          paddr_32bit:1;
-        bool             smm_dual:1;
-        uint32_t    vmcs_mem_type:4;
-        bool     inouts_exit_info:1;
-        bool            true_ctls:1;
-    };
-} msr_vmx_basic_t;
-
-#endif /* !__ASSEMBLY__ */
-#endif /* XFT_X86_MSR_INDEX_H */
+#endif /* XTF_X86_MSR_INDEX_H */
 
 /*
  * Local variables:

diff --git a/arch/x86/include/arch/msr.h b/arch/x86/include/arch/msr.h
new file mode 100644 (file)
index 0000000..3c58eaf
--- /dev/null
+++ b/arch/x86/include/arch/msr.h
@@ -0,0 +1,120 @@
+/**
+ * @file arch/x86/include/arch/msr.h
+ *
+ * Misc C-level infrastructure for MSRs.
+ */
+#ifndef XTF_X86_MSR_H
+#define XTF_X86_MSR_H
+
+#include <xtf/extable.h>
+#include <xtf/types.h>
+
+#include <xen/arch-x86/xen.h>
+
+#include <arch/msr-index.h>
+
+/**
+ * Thin wrapper around an `rdmsr` instruction.  May crash with @#GP[0].
+ */
+static inline uint64_t rdmsr(uint32_t idx)
+{
+    uint32_t lo, hi;
+
+    asm volatile ("rdmsr": "=a" (lo), "=d" (hi): "c" (idx));
+
+    return (((uint64_t)hi) << 32) | lo;
+}
+
+/**
+ * Wrapper around `rdmsr` which safely catches @#GP[0].
+ *
+ * @param idx MSR to read
+ * @param [out] val Value, if no fault occurred.
+ * @return boolean indicating whether the read faulted.
+ */
+static inline bool rdmsr_safe(uint32_t idx, uint64_t *val)
+{
+    uint32_t lo, hi, new_idx;
+
+    asm volatile ("1: rdmsr; 2:"
+                  _ASM_EXTABLE_HANDLER(1b, 2b, ex_rdmsr_safe)
+                  : "=a" (lo), "=d" (hi), "=c" (new_idx)
+                  : "c" (idx), "X" (ex_rdmsr_safe));
+
+    bool fault = idx != new_idx;
+
+    if ( !fault )
+        *val = (((uint64_t)hi) << 32) | lo;
+
+    return fault;
+}
+
+/**
+ * Thin wrapper around an `wrmsr` instruction.  May crash with @#GP[0].
+ */
+static inline void wrmsr(uint32_t idx, uint64_t val)
+{
+    asm volatile ("wrmsr":
+                  : "c" (idx), "a" ((uint32_t)val),
+                    "d" ((uint32_t)(val >> 32)));
+}
+
+/**
+ * Wrapper around `wrmsr` which safely catches @#GP[0].
+ *
+ * @param idx MSR to write
+ * @param val Value to write
+ * @return boolean indicating whether the write faulted.
+ */
+static inline bool wrmsr_safe(uint32_t idx, uint64_t val)
+{
+    uint32_t new_idx;
+
+    asm volatile ("1: wrmsr; 2:"
+                  _ASM_EXTABLE_HANDLER(1b, 2b, ex_wrmsr_safe)
+                  : "=c" (new_idx)
+                  : "c" (idx), "a" ((uint32_t)val),
+                    "d" ((uint32_t)(val >> 32)),
+                    "X" (ex_wrmsr_safe));
+
+    return idx != new_idx;
+}
+
+/*
+ * Types wrapping MSR content.
+ */
+typedef union msr_feature_control {
+    uint64_t raw;
+    struct {
+        bool lock:1,
+            vmxon_inside_smx:1,
+            vmxon_outside_smx:1;
+    };
+} msr_feature_control_t;
+
+typedef union msr_vmx_basic {
+    uint64_t raw;
+    struct {
+        uint32_t      vmcs_rev_id:31;
+        bool                  mbz:1;
+        uint32_t        vmcs_size:13;
+        uint32_t                 :3;
+        bool          paddr_32bit:1;
+        bool             smm_dual:1;
+        uint32_t    vmcs_mem_type:4;
+        bool     inouts_exit_info:1;
+        bool            true_ctls:1;
+    };
+} msr_vmx_basic_t;
+
+#endif /* XTF_X86_MSR_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */

diff --git a/arch/x86/include/arch/xtf.h b/arch/x86/include/arch/xtf.h
index c1f028aa3ba3d84628174ae900038f0eab474f8a..f860b327e41e4fda97b46ae89a84ee1f4b71370d 100644 (file)
--- a/arch/x86/include/arch/xtf.h
+++ b/arch/x86/include/arch/xtf.h
@@ -3,6 +3,7 @@
 
 #include <arch/cpuid.h>
 #include <arch/lib.h>
+#include <arch/msr.h>
 
 extern char _end[];
 

diff --git a/tests/cpuid-faulting/main.c b/tests/cpuid-faulting/main.c
index 23fa6ca3d2dae2f3504f556804d18aa49b222d22..3bab8fae77f04849aecf242c06e3a0ed9899eb4f 100644 (file)
--- a/tests/cpuid-faulting/main.c
+++ b/tests/cpuid-faulting/main.c
@@ -22,7 +22,6 @@
 #include <xtf.h>
 
 #include <arch/exinfo.h>
-#include <arch/msr-index.h>
 #include <arch/processor.h>
 
 const char test_title[] = "Guest CPUID Faulting support";

diff --git a/tests/invlpg/main.c b/tests/invlpg/main.c
index c62c92ee23d3586be1c1b9b450be5da26063efe1..2e5c5190d7b89c1797be03eccebad13e3344b9f8 100644 (file)
--- a/tests/invlpg/main.c
+++ b/tests/invlpg/main.c
@@ -84,7 +84,6 @@
 
 #include <arch/decode.h>
 #include <arch/desc.h>
-#include <arch/msr-index.h>
 #include <arch/symbolic-const.h>
 
 const char test_title[] = "Invlpg tests";

diff --git a/tests/lbr-tsx-vmentry/main.c b/tests/lbr-tsx-vmentry/main.c
index 734e9cdeeeec1b6e4450338960c249f3c1edbd9b..75f8059562db699bccfab1688de98f2ab26715d6 100644 (file)
--- a/tests/lbr-tsx-vmentry/main.c
+++ b/tests/lbr-tsx-vmentry/main.c
@@ -34,8 +34,6 @@
  */
 #include <xtf.h>
 
-#include <arch/msr-index.h>
-
 const char test_title[] = "LBR/TSX VMentry failure test";
 
 static void int3_stub(void)

diff --git a/tests/vvmx/test.h b/tests/vvmx/test.h
index 0e32ce57598fb4fbbd950785e583c4ad0f4ae54c..5d9664f8aa4d7e6db98a4aa5bda9afe94dc476fc 100644 (file)
--- a/tests/vvmx/test.h
+++ b/tests/vvmx/test.h
@@ -3,7 +3,6 @@
 
 #include <xtf.h>
 
-#include <arch/msr-index.h>
 #include <arch/vmx.h>
 
 /*

diff --git a/tests/xsa-193/main.c b/tests/xsa-193/main.c
index e93c67ce69b326169cbb1337dc1dec8bacb125b5..312f52071d9ea6b4f553131c0b121cdf1bda6e01 100644 (file)
--- a/tests/xsa-193/main.c
+++ b/tests/xsa-193/main.c
@@ -19,8 +19,6 @@
  */
 #include <xtf.h>
 
-#include <arch/msr-index.h>
-
 const char test_title[] = "XSA-193 PoC";
 
 void test_main(void)

diff --git a/tests/xsa-204/main.c b/tests/xsa-204/main.c
index 6618aa3d7c68d0306970802c6c993df79127210a..3d1406fd2975e6890bdd661c58839855a1f0624b 100644 (file)
--- a/tests/xsa-204/main.c
+++ b/tests/xsa-204/main.c
@@ -21,7 +21,6 @@
  */
 #include <xtf.h>
 
-#include <arch/msr-index.h>
 #include <arch/processor.h>
 
 bool test_needs_fep = true;