Factor non-secure system initialisation

When we add PSCI, we'll want to share the same non-secure sysetem
initialisation code. As we're going to want to put spin-table and PSCI
implementations in separate files, it would be nice to have the
initialisation code in its own file, to make clear the separation
between early boot, platform interface code, and non-secure system
initialisation.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>

diff --git a/Makefile b/Makefile
index 4d5a8507b64f6f7cfad7c84c7ff0eb36f9fa116b..21fd8b819041f4d635e96bee1cb94aa330c914ca 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -65,9 +65,9 @@ DTC           := $(if $(wildcard ./dtc), ./dtc, $(shell which dtc))
 all: $(IMAGE)
 
 clean:
-       rm -f $(IMAGE) boot.o model.lds fdt.dtb
+       rm -f $(IMAGE) boot.o ns.o model.lds fdt.dtb
 
-$(IMAGE): boot.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM)
+$(IMAGE): boot.o ns.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM)
        $(LD) -o $@ --script=model.lds
 
 %.o: %.S Makefile

diff --git a/boot.S b/boot.S
index eda42f961bca4b5624060559567da8eff25f25b6..391e74b4a36b8404e85496562238e212be8be12b 100644 (file)
--- a/boot.S
+++ b/boot.S
@@ -90,27 +90,11 @@ start_ns:
        br      x4                              // branch to the given address
 
 2:
-       /*
-        * UART initialisation (38400 8N1)
-        */
-       ldr     x4, =UART_BASE                  // UART base
-       mov     w5, #0x10                       // ibrd
-       str     w5, [x4, #0x24]
-       mov     w5, #0xc300
-       orr     w5, w5, #0x0001                 // cr
-       str     w5, [x4, #0x30]
-
-       /*
-        * CLCD output site MB
-        */
-       ldr     x4, =SYSREGS_BASE
-       ldr     w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16)      // START|WRITE|MUXFPGA|SITE_MB
-       str     wzr, [x4, #0xa0]                // V2M_SYS_CFGDATA
-       str     w5, [x4, #0xa4]                 // V2M_SYS_CFGCTRL
 
        /*
         * Primary CPU
         */
+       bl      ns_init_system
        ldr     x0, =dtb                        // device tree blob
        b       kernel
 

diff --git a/model.lds.S b/model.lds.S
index ec2743344c11f2dada177ff44af0402a55aef863..23aa1bf820531f7cb2a2ff770e47ca43c36984f3 100644 (file)
--- a/model.lds.S
+++ b/model.lds.S
@@ -12,6 +12,7 @@ OUTPUT_ARCH(aarch64)
 TARGET(binary)
 
 INPUT(./boot.o)
+INPUT(./ns.o)
 INPUT(KERNEL)
 INPUT(./fdt.dtb)
 
@@ -23,6 +24,7 @@ SECTIONS
 {
        . = PHYS_OFFSET;
        .text : { boot.o }
+       .text : { ns.o }
        . = PHYS_OFFSET + MBOX_OFFSET;
        mbox = .;
        .mbox : { QUAD(0x0) }

diff --git a/ns.S b/ns.S
new file mode 100644 (file)
index 0000000..f432bcf
--- /dev/null
+++ b/ns.S
@@ -0,0 +1,41 @@
+/*
+ * ns.S - code to initialise everything required when first booting non-secure.
+ *
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE.txt file.
+ */
+
+#define PL011_UARTIBRD 0x24
+#define PL011_UARTCR   0x30
+
+#define V2M_SYS_CFGDATA        0xa0
+#define V2M_SYS_CFGCTRL        0xa4
+
+       .text
+       .globl ns_init_system
+
+ns_init_system:
+       /*
+        * UART initialisation (38400 8N1)
+        */
+       ldr     x4, =UART_BASE
+       mov     w5, #0x10
+       str     w5, [x4, #PL011_UARTIBRD]
+       mov     w5, #0xc300
+       orr     w5, w5, #0x0001 
+       str     w5, [x4, #PL011_UARTCR]
+
+       /*
+        * CLCD output site MB
+        */
+       ldr     x4, =SYSREGS_BASE
+       ldr     w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16)      // START|WRITE|MUXFPGA|SITE_MB
+       str     wzr, [x4, #V2M_SYS_CFGDATA]
+       str     w5, [x4, #V2M_SYS_CFGCTRL]
+
+       ret
+
+       .ltorg
+       .org 0x40