--- /dev/null
+Machine (P#0 total=2096684KB DMIProductName=AltixXE320 DMIProductVersion=AltixXE DMIBoardVendor=SM DMIBoardName=X7DWT-INF DMIBoardVersion=1.01 DMIBoardAssetTag= DMIChassisVendor=SGI.COM DMIChassisType=1 DMIChassisVersion=013-5556-002 DMIChassisAssetTag=" " DMIBIOSVendor="Phoenix Technologies LTD" DMIBIOSVersion=.0b\r DMIBIOSDate=03/24/2008 DMISysVendor=SGI.COM Backend=Linux LinuxCgroup=/)
+ NUMANode L#0 (P#0 local=2096684KB total=2096684KB)
+ Socket L#0 (P#0 CPUModel="Intel(R) Xeon(R) CPU E5472 @ 3.00GHz")
+ L2Cache L#0 (size=6144KB linesize=64 ways=24)
+ L1dCache L#0 (size=32KB linesize=64 ways=8)
+ L1iCache L#0 (size=32KB linesize=64 ways=8)
+ Core L#0 (P#0)
+ PU L#0 (P#0)
+ L1dCache L#1 (size=32KB linesize=64 ways=8)
+ L1iCache L#1 (size=32KB linesize=64 ways=8)
+ Core L#1 (P#1)
+ PU L#1 (P#2)
+ L2Cache L#1 (size=6144KB linesize=64 ways=24)
+ L1dCache L#2 (size=32KB linesize=64 ways=8)
+ L1iCache L#2 (size=32KB linesize=64 ways=8)
+ Core L#2 (P#2)
+ PU L#2 (P#4)
+ L1dCache L#3 (size=32KB linesize=64 ways=8)
+ L1iCache L#3 (size=32KB linesize=64 ways=8)
+ Core L#3 (P#3)
+ PU L#3 (P#6)
+ Socket L#1 (P#1 CPUModel="Intel(R) Xeon(R) CPU E5472 @ 3.00GHz")
+ L2Cache L#2 (size=6144KB linesize=64 ways=24)
+ L1dCache L#4 (size=32KB linesize=64 ways=8)
+ L1iCache L#4 (size=32KB linesize=64 ways=8)
+ Core L#4 (P#0)
+ PU L#4 (P#1)
+ L1dCache L#5 (size=32KB linesize=64 ways=8)
+ L1iCache L#5 (size=32KB linesize=64 ways=8)
+ Core L#5 (P#1)
+ PU L#5 (P#3)
+ L2Cache L#3 (size=6144KB linesize=64 ways=24)
+ L1dCache L#6 (size=32KB linesize=64 ways=8)
+ L1iCache L#6 (size=32KB linesize=64 ways=8)
+ Core L#6 (P#2)
+ PU L#6 (P#5)
+ L1dCache L#7 (size=32KB linesize=64 ways=8)
+ L1iCache L#7 (size=32KB linesize=64 ways=8)
+ Core L#7 (P#3)
+ PU L#7 (P#7)
+depth 0: 1 Machine (type #1)
+ depth 1: 1 NUMANode (type #2)
+ depth 2: 2 Socket (type #3)
+ depth 3: 4 L2Cache (type #4)
+ depth 4: 8 L1dCache (type #4)
+ depth 5: 8 L1iCache (type #4)
+ depth 6: 8 Core (type #5)
+ depth 7: 8 PU (type #6)
+Topology not from this system
-# Copyright © 2009-2013 Inria. All rights reserved.
+# Copyright © 2009-2014 Inria. All rights reserved.
# Copyright © 2009-2011 Université Bordeaux 1
# Copyright © 2009-2010 Cisco Systems, Inc. All rights reserved.
# See COPYING in top-level directory.
8amd64-4n2c.output \
8em64t-4c2t.output \
8em64t-2s2ca2c.output \
+ 8em64t-2s2ca2c-buggynuma.output \
8em64t-2s4c-heterogeneous.output \
8ia64-2n2s2c.output \
8ia64-2s2c2t.output \
8amd64-4n2c.tar.bz2 \
8em64t-4c2t.tar.bz2 \
8em64t-2s2ca2c.tar.bz2 \
+ 8em64t-2s2ca2c-buggynuma.tar.bz2 \
8em64t-2s4c-heterogeneous.tar.bz2 \
8ia64-2n2s2c.tar.bz2 \
8ia64-2s2c2t.tar.bz2 \