]> xenbits.xensource.com Git - xen.git/commitdiff
x86: drop REX64_PREFIX
authorJan Beulich <jbeulich@suse.com>
Mon, 22 Jul 2024 07:39:40 +0000 (09:39 +0200)
committerJan Beulich <jbeulich@suse.com>
Mon, 22 Jul 2024 07:39:40 +0000 (09:39 +0200)
While we didn't copy the full Linux commentary, Linux commit
7180d4fb8308 ("x86_64: Fix 64bit FXSAVE encoding") is quite explicit
about gas 2.16 supporting FXSAVEQ / FXRSTORQ. As that's presently our
minimal required version, we can drop the workaround that was needed for
yet older gas.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/i387.c
xen/arch/x86/include/asm/asm_defns.h

index fcdee10a6e698fcadd5bb9de4618b5a31c74e743..400c70114ad5721282880a8b825b95c6124fe03f 100644 (file)
@@ -64,13 +64,12 @@ static inline void fpu_fxrstor(struct vcpu *v)
     {
     default:
         asm volatile (
-            /* See below for why the operands/constraints are this way. */
-            "1: " REX64_PREFIX "fxrstor (%2)\n"
+            "1: fxrstorq %0\n"
             ".section .fixup,\"ax\"   \n"
             "2: push %%"__OP"ax       \n"
             "   push %%"__OP"cx       \n"
             "   push %%"__OP"di       \n"
-            "   mov  %2,%%"__OP"di    \n"
+            "   lea  %0,%%"__OP"di    \n"
             "   mov  %1,%%ecx         \n"
             "   xor  %%eax,%%eax      \n"
             "   rep ; stosl           \n"
@@ -81,7 +80,7 @@ static inline void fpu_fxrstor(struct vcpu *v)
             ".previous                \n"
             _ASM_EXTABLE(1b, 2b)
             :
-            : "m" (*fpu_ctxt), "i" (sizeof(*fpu_ctxt) / 4), "R" (fpu_ctxt) );
+            : "m" (*fpu_ctxt), "i" (sizeof(*fpu_ctxt) / 4) );
         break;
     case 4: case 2:
         asm volatile (
@@ -157,13 +156,7 @@ static inline void fpu_fxsave(struct vcpu *v)
 
     if ( fip_width != 4 )
     {
-        /*
-         * The only way to force fxsaveq on a wide range of gas versions.
-         * On older versions the rex64 prefix works only if we force an
-         * addressing mode that doesn't require extended registers.
-         */
-        asm volatile ( REX64_PREFIX "fxsave (%1)"
-                       : "=m" (*fpu_ctxt) : "R" (fpu_ctxt) );
+        asm volatile ( "fxsaveq %0" : "=m" (*fpu_ctxt) );
 
         /*
          * Some CPUs don't save/restore FDP/FIP/FOP unless an exception is
index 0a3ff70566114f30fd160ad2a3b8af6f045ed7bd..92b4116a1564db442334b5631046665fdc3b3974 100644 (file)
@@ -331,14 +331,6 @@ static always_inline void stac(void)
 #define safe_swapgs                             \
         "mfence; swapgs;"
 
-#ifdef __sun__
-#define REX64_PREFIX "rex64\\"
-#elif defined(__clang__)
-#define REX64_PREFIX ".byte 0x48; "
-#else
-#define REX64_PREFIX "rex64/"
-#endif
-
 #define ELFNOTE(name, type, desc)           \
     .pushsection .note.name, "a", @note   ; \
     .p2align 2                            ; \