]> xenbits.xensource.com Git - people/pauldu/qemu.git/commitdiff
cpu: add CPU_RESOLVING_TYPE macro
authorIgor Mammedov <imammedo@redhat.com>
Wed, 7 Feb 2018 10:40:25 +0000 (11:40 +0100)
committerEduardo Habkost <ehabkost@redhat.com>
Mon, 19 Mar 2018 17:10:36 +0000 (14:10 -0300)
it will be used for providing to cpu name resolving class for
parsing cpu model for system and user emulation code.

Along with change add target to null-machine tests, so
that when switch to CPU_RESOLVING_TYPE happens,
it would ensure that null-machine usecase still works.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu> (m68k)
Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc)
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore)
Message-Id: <1518000027-274608-4-git-send-email-imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
[ehabkost: Added macro to riscv too]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
21 files changed:
target/alpha/cpu.h
target/arm/cpu.h
target/cris/cpu.h
target/hppa/cpu.h
target/i386/cpu.h
target/lm32/cpu.h
target/m68k/cpu.h
target/microblaze/cpu.h
target/mips/cpu.h
target/moxie/cpu.h
target/nios2/cpu.h
target/openrisc/cpu.h
target/ppc/cpu.h
target/riscv/cpu.h
target/s390x/cpu.h
target/sh4/cpu.h
target/sparc/cpu.h
target/tilegx/cpu.h
target/tricore/cpu.h
target/unicore32/cpu.h
target/xtensa/cpu.h

index a79fc2e780a6b0314f3dac583a0c178a03490a48..905855a2a10dbe13bdda9e160f33cd94782ac2b3 100644 (file)
@@ -470,6 +470,7 @@ void alpha_translate_init(void);
 
 #define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
 #define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
 
 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
index 1e7e1f8a7e1ee49ed95ce7f366ceab6a25295fb0..f4b4258655f3c2bb29b8e85f52f6eaf620c92db0 100644 (file)
@@ -2306,6 +2306,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
 
 #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
 #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
+#define CPU_RESOLVING_TYPE TYPE_ARM_CPU
 
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_list arm_cpu_list
index 764b35cbae0acd0cca5ae0d177db4a4990ea7654..cfb877c488a7fc3cd91a8451a8d60569090e1553 100644 (file)
@@ -271,6 +271,7 @@ enum {
 
 #define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
 #define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
+#define CPU_RESOLVING_TYPE TYPE_CRIS_CPU
 
 #define cpu_signal_handler cpu_cris_signal_handler
 
index c88d844938a8dfe990096eac6166daf1d32bab87..6ea5f4c4e4f7f180be91e33b02b7791c09e04e08 100644 (file)
@@ -267,6 +267,7 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
 void hppa_translate_init(void);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model)
+#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
 
 void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 
index 2e2bab5ff39e47a0fa62d2cd436a0588ad558e04..63aea9abcd0a436b4747bcfa01c79d9ec1bdbc52 100644 (file)
@@ -1593,6 +1593,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
 
 #define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
 #define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
+#define CPU_RESOLVING_TYPE TYPE_X86_CPU
 
 #ifdef TARGET_X86_64
 #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu64")
index ce0a2f24c42025b58ee459e8427708f347caebbb..6f419555282f30142be5dfefbef4bd5f17ff769d 100644 (file)
@@ -259,6 +259,7 @@ bool lm32_cpu_do_semihosting(CPUState *cs);
 
 #define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU
 #define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_LM32_CPU
 
 #define cpu_list lm32_cpu_list
 #define cpu_signal_handler cpu_lm32_signal_handler
index 2259bf22dc004b485c327313e945ac612ab1b03c..f102e7216db4043902c16b8b35895eb57eeecfd3 100644 (file)
@@ -531,6 +531,7 @@ enum {
 
 #define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
 #define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_M68K_CPU
 
 #define cpu_signal_handler cpu_m68k_signal_handler
 #define cpu_list m68k_cpu_list
index 1fe21c8539586d57f052eee3069cb44dd7e6d20d..55f63f7b24e82b604b5cd3bb3a8346f8da2ceef4 100644 (file)
@@ -344,6 +344,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_model)
+#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU
 
 #define cpu_signal_handler cpu_mb_signal_handler
 
index 7f8ba5ff3e8c948169da0fbab9938210dc655911..0fcbfb3553c7226b196ec0780b0a94c80b24b116 100644 (file)
@@ -743,6 +743,7 @@ int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
 #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
 #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
 
 bool cpu_supports_cps_smp(const char *cpu_type);
 bool cpu_supports_isa(const char *cpu_type, unsigned int isa);
index d85e1fc061aaf8f6c7f6b0efd522c50895461a9b..5e88c02dfbaa69a7d676d3f5f0f1fe1275b5a525 100644 (file)
@@ -123,6 +123,7 @@ int cpu_moxie_signal_handler(int host_signum, void *pinfo,
 
 #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
 #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
 
 #define cpu_signal_handler cpu_moxie_signal_handler
 
index cd4e40d1b45e1cc545a6e1c02e030083ec3c8004..4ab1da328573c5c4c0767e933638536b4252463e 100644 (file)
@@ -231,6 +231,7 @@ void nios2_check_interrupts(CPUNios2State *env);
 #endif
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model)
+#define CPU_RESOLVING_TYPE TYPE_NIOS2_CPU
 
 #define cpu_gen_code cpu_nios2_gen_code
 #define cpu_signal_handler cpu_nios2_signal_handler
index 5050b1135c09a2932ad20cd77ab756dbf83b23c8..87018c7b8e003f5bba4fb4db70c13d684db56f76 100644 (file)
@@ -393,6 +393,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
 
 #define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU
 #define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU
 
 #include "exec/cpu-all.h"
 
index 7bde1884a142e1091acdc6ebbd021830e8720adf..f6d0cd2f0f8487f4a004efa808ed91cec8fc0b3d 100644 (file)
@@ -1379,6 +1379,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
 
 #define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU
 #define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU
 
 #define cpu_signal_handler cpu_ppc_signal_handler
 #define cpu_list ppc_cpu_list
index cff02a2857b5ccfb7e406a7271ad41a1f16d7636..41e06ac0f91d904a1fb42124a9df28faa0e02c69 100644 (file)
@@ -46,6 +46,7 @@
 
 #define RISCV_CPU_TYPE_SUFFIX "-" TYPE_RISCV_CPU
 #define RISCV_CPU_TYPE_NAME(name) (name RISCV_CPU_TYPE_SUFFIX)
+#define CPU_RESOLVING_TYPE TYPE_RISCV_CPU
 
 #define TYPE_RISCV_CPU_ANY              RISCV_CPU_TYPE_NAME("any")
 #define TYPE_RISCV_CPU_RV32GCSU_V1_09_1 RISCV_CPU_TYPE_NAME("rv32gcsu-v1.9.1")
index 5f357a4e2d5fac5b67e380c3bfe5036c6fe9c2fe..fa76236bf01ca7fe86d5a540d8c7cbb85d2abd43 100644 (file)
@@ -723,6 +723,7 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga,
 
 #define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
 #define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
+#define CPU_RESOLVING_TYPE TYPE_S390_CPU
 
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
index a649b68d7876b9f90b1f17ee904ee2913e2225f1..04b3d6c09beffc315f37b41526b923cfcacbb9c5 100644 (file)
@@ -276,6 +276,7 @@ void cpu_load_tlb(CPUSH4State * env);
 
 #define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
 #define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
 
 #define cpu_signal_handler cpu_sh4_signal_handler
 #define cpu_list sh4_cpu_list
index 9724134a5b7671ae2637697d1ef121ca2282cf5e..dfe143a9630caebb3f302808d703dc7a909edb6c 100644 (file)
@@ -658,6 +658,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
 
 #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
 #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_SPARC_CPU
 
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_list sparc_cpu_list
index 71cea045896029f7926c860b5b037c296f727d9d..a73215e6cf86ed1febe9414ac6646d82d6f1765f 100644 (file)
@@ -165,6 +165,7 @@ void tilegx_tcg_init(void);
 int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model)
+#define CPU_RESOLVING_TYPE TYPE_TILEGX_CPU
 
 #define cpu_signal_handler cpu_tilegx_signal_handler
 
index 07b8b59f589d68cec2e88741c44ef9a26e1da199..9241a91faa50c43ea7340c9e7a74b56a5ab49ddd 100644 (file)
@@ -417,6 +417,7 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
 
 #define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
 #define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
 
 /* helpers.c */
 int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
index 42e1d52478c83bcdd1b1da2c7e40c8965b0561f4..1db9b6cdf99468f896f1c92aee72f5c5615a8334 100644 (file)
@@ -168,6 +168,7 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
 
 #define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU
 #define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_UNICORE32_CPU
 
 static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc,
                                         target_ulong *cs_base, uint32_t *flags)
index 957f0fd59a98dacb153983f7cab2d007019f5267..0691c8dcb3d9f814441bdee370c7af873e4d2012 100644 (file)
@@ -513,6 +513,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
 
 #define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
 #define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
 
 #ifdef TARGET_WORDS_BIGENDIAN
 #define XTENSA_DEFAULT_CPU_MODEL "fsf"