]> xenbits.xensource.com Git - people/pauldu/qemu.git/commitdiff
target-arm: Suppress EPD for S2, EL2 and EL3 translations
authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Mon, 14 Sep 2015 13:39:50 +0000 (14:39 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 14 Sep 2015 13:39:50 +0000 (14:39 +0100)
Stage-2 translations, EL2 and EL3 regimes don't have the
EPD control.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-6-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/helper.c

index 200b9f2e9fbe05d6185094ad377a512f78b74eae..478347b38b38f1809b4199b166c82ddf72527c0e 100644 (file)
@@ -6344,7 +6344,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
     /* Read an LPAE long-descriptor translation table. */
     MMUFaultType fault_type = translation_fault;
     uint32_t level = 1;
-    uint32_t epd;
+    uint32_t epd = 0;
     int32_t tsz;
     uint32_t tg;
     uint64_t ttbr;
@@ -6438,7 +6438,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
      */
     if (ttbr_select == 0) {
         ttbr = regime_ttbr(env, mmu_idx, 0);
-        epd = extract32(tcr->raw_tcr, 7, 1);
+        if (el < 2) {
+            epd = extract32(tcr->raw_tcr, 7, 1);
+        }
         tsz = t0sz;
 
         tg = extract32(tcr->raw_tcr, 14, 2);