}
}
-int __init xen_in_range(unsigned long mfn)
+int __hwdom_init xen_in_range(unsigned long mfn)
{
paddr_t start, end;
int i;
enum { region_s3, region_text, region_bss, nr_regions };
static struct {
paddr_t s, e;
- } xen_regions[nr_regions] __initdata;
+ } xen_regions[nr_regions] __hwdom_initdata;
/* initialize first time */
if ( !xen_regions[0].s )
}
}
-static int __init amd_iommu_setup_dom0_device(u8 devfn, struct pci_dev *pdev)
+static int __hwdom_init amd_iommu_setup_dom0_device(
+ u8 devfn, struct pci_dev *pdev)
{
int bdf = PCI_BDF2(pdev->bus, pdev->devfn);
struct amd_iommu *iommu = find_iommu_for_device(pdev->seg, bdf);
return 0;
}
-static void __init amd_iommu_dom0_init(struct domain *d)
+static void __hwdom_init amd_iommu_dom0_init(struct domain *d)
{
unsigned long i;
bool_t __initdata iommu_enable = 1;
bool_t __read_mostly iommu_enabled;
bool_t __read_mostly force_iommu;
-bool_t __initdata iommu_dom0_strict;
+bool_t __hwdom_initdata iommu_dom0_strict;
bool_t __read_mostly iommu_verbose;
bool_t __read_mostly iommu_workaround_bios_bug;
bool_t __read_mostly iommu_passthrough;
return hd->platform_ops->init(d);
}
-static __init void check_dom0_pvh_reqs(struct domain *d)
+static void __hwdom_init check_dom0_pvh_reqs(struct domain *d)
{
if ( !iommu_enabled )
panic("Presently, iommu must be enabled for pvh dom0\n");
iommu_dom0_strict = 1;
}
-void __init iommu_dom0_init(struct domain *d)
+void __hwdom_init iommu_dom0_init(struct domain *d)
{
struct hvm_iommu *hd = domain_hvm_iommu(d);
PCI_SLOT(devfn) == PCI_SLOT(pdev->devfn) );
}
-static int __init _setup_dom0_pci_devices(struct pci_seg *pseg, void *arg)
+static int __hwdom_init _setup_dom0_pci_devices(struct pci_seg *pseg, void *arg)
{
struct setup_dom0 *ctxt = arg;
int bus, devfn;
return 0;
}
-void __init setup_dom0_pci_devices(
+void __hwdom_init setup_dom0_pci_devices(
struct domain *d, int (*handler)(u8 devfn, struct pci_dev *))
{
struct setup_dom0 ctxt = { .d = d, .handler = handler };
return 0;
}
-static void __init intel_iommu_dom0_init(struct domain *d)
+static void __hwdom_init intel_iommu_dom0_init(struct domain *d)
{
struct acpi_drhd_unit *drhd;
return domain_context_unmap(pdev->domain, devfn, pdev);
}
-static int __init setup_dom0_device(u8 devfn, struct pci_dev *pdev)
+static int __hwdom_init setup_dom0_device(u8 devfn, struct pci_dev *pdev)
{
int err;
return 0;
}
-static void __init setup_dom0_rmrr(struct domain *d)
+static void __hwdom_init setup_dom0_rmrr(struct domain *d)
{
struct acpi_rmrr_unit *rmrr;
u16 bdf;
* - This can cause system failure upon non-fatal VT-d faults
* - Potential security issue if malicious guest trigger VT-d faults
*/
-void __init pci_vtd_quirk(struct pci_dev *pdev)
+void __hwdom_init pci_vtd_quirk(struct pci_dev *pdev)
{
int seg = pdev->seg;
int bus = pdev->bus;
* iommu_inclusive_mapping: when set, all memory below 4GB is included in dom0
* 1:1 iommu mappings except xen and unusable regions.
*/
-static bool_t __initdata iommu_inclusive_mapping = 1;
+static bool_t __hwdom_initdata iommu_inclusive_mapping = 1;
boolean_param("iommu_inclusive_mapping", iommu_inclusive_mapping);
void *map_vtd_domain_page(u64 maddr)
spin_unlock(&d->event_lock);
}
-void __init iommu_set_dom0_mapping(struct domain *d)
+void __hwdom_init iommu_set_dom0_mapping(struct domain *d)
{
unsigned long i, j, tmp, top;
#define CONFIG_MULTIBOOT 1
+#ifdef XSM_ENABLE
+#define CONFIG_LATE_HWDOM 1
+#endif
+
#define HZ 100
#define OPT_CONSOLE_STR "vga"
#define __devexitdata __exitdata
#endif
+#ifdef CONFIG_LATE_HWDOM
+#define __hwdom_init
+#define __hwdom_initdata __read_mostly
+#else
+#define __hwdom_init __init
+#define __hwdom_initdata __initdata
+#endif
+
#endif /* _LINUX_INIT_H */