plat/common/arm: Do not use a barrier on every invalidation

The current implementation of clean and invalidate by region uses
a barrier after every cache line. This is unnecessary and expensive.
Use a barrier once, at the end of the operation.

Signed-off-by: Michalis Pappas <michalis@unikraft.io>
Reviewed-by: Sergiu Moga <sergiu@unikraft.io>
Approved-by: Razvan Deaconescu <razvand@unikraft.io>
Tested-by: Unikraft CI <monkey@unikraft.io>
GitHub-Closes: #1049

diff --git a/plat/common/arm/cache64.S b/plat/common/arm/cache64.S
index 8b5e644feca73f260d75393e4915f73c131880b8..498979a60d73b1b60629501f68708ad28b9157d4 100644 (file)
--- a/plat/common/arm/cache64.S
+++ b/plat/common/arm/cache64.S
@@ -60,7 +60,6 @@ ENTRY(clean_and_invalidate_dcache_range)
 1:
        /* clean and invalidate D cache by D cache line size */
        dc      civac, x0
-       dsb     nsh
 
        /* Move to next line and reduce the size */
        add     x0, x0, x3
@@ -68,9 +67,7 @@ ENTRY(clean_and_invalidate_dcache_range)
 
        /* Check if all range has been invalidated */
        b.hi    1b
-
-       isb
-
+       dsb     sy
        ret
 END(clean_and_invalidate_dcache_range)
 
@@ -99,8 +96,6 @@ ENTRY(invalidate_dcache_range)
 
        /* Check if all range has been invalidated */
        b.hi    1b
-
-       isb
-
+       dsb     sy
        ret
 END(invalidate_dcache_range)