#define PCI_BRIDGE_MEM_MIN (1<<21) // 2M == hugepage size
#define PCI_BRIDGE_IO_MIN 0x1000 // mandated by pci bridge spec
-enum pci_region_type {
- PCI_REGION_TYPE_IO,
- PCI_REGION_TYPE_MEM,
- PCI_REGION_TYPE_PREFMEM,
- PCI_REGION_TYPE_COUNT,
-};
-
static const char *region_type_name[] = {
[ PCI_REGION_TYPE_IO ] = "io",
[ PCI_REGION_TYPE_MEM ] = "mem",
for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
u64 align = (type == PCI_REGION_TYPE_IO) ?
PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
+ if (!pci_bridge_has_region(s->bus_dev, type))
+ continue;
if (pci_region_align(&s->r[type]) > align)
align = pci_region_align(&s->r[type]);
u64 sum = pci_region_sum(&s->r[type]);
return 0;
}
+/* Test whether bridge support forwarding of transactions
+ * of a specific type.
+ * Note: disables bridge's window registers as a side effect.
+ */
+int pci_bridge_has_region(struct pci_device *pci,
+ enum pci_region_type region_type)
+{
+ u8 base;
+
+ switch (region_type) {
+ case PCI_REGION_TYPE_IO:
+ base = PCI_IO_BASE;
+ break;
+ case PCI_REGION_TYPE_PREFMEM:
+ base = PCI_PREF_MEMORY_BASE;
+ break;
+ default:
+ /* Regular memory support is mandatory */
+ return 1;
+ }
+
+ pci_config_writeb(pci->bdf, base, 0xFF);
+
+ return pci_config_readb(pci->bdf, base) != 0;
+}
+
void
pci_reboot(void)
{
#define PCI_NUM_REGIONS 7
#define PCI_BRIDGE_NUM_REGIONS 2
+enum pci_region_type {
+ PCI_REGION_TYPE_IO,
+ PCI_REGION_TYPE_MEM,
+ PCI_REGION_TYPE_PREFMEM,
+ PCI_REGION_TYPE_COUNT,
+};
+
static inline u8 pci_bdf_to_bus(u16 bdf) {
return bdf >> 8;
}
struct pci_device *pci_find_init_device(const struct pci_device_id *ids
, void *arg);
u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
+int pci_bridge_has_region(struct pci_device *pci,
+ enum pci_region_type region_type);
void pci_reboot(void);
#endif