/* PVH 32bitfixme */
ASSERT(!compat);
- if ( c(ctrlreg[1]) || c(ldt_base) || c(ldt_ents) ||
+ if ( c(ctrlreg[0]) || c(ctrlreg[1]) || c(ctrlreg[2]) ||
+ c(ctrlreg[4]) || c(ctrlreg[5]) || c(ctrlreg[6]) ||
+ c(ctrlreg[7]) || c(ldt_base) || c(ldt_ents) ||
c(user_regs.cs) || c(user_regs.ss) || c(user_regs.es) ||
c(user_regs.ds) || c(user_regs.fs) || c(user_regs.gs) ||
+ c(kernel_ss) || c(kernel_sp) || c.nat->gs_base_kernel ||
c.nat->gdt_ents || c.nat->fs_base || c.nat->gs_base_user )
return -EINVAL;
}
if ( has_hvm_container_vcpu(v) )
{
- /*
- * NB: TF_kernel_mode is set unconditionally for HVM guests,
- * so we always use the gs_base_kernel here. If we change this
- * function to imitate the PV functionality, we'll need to
- * make it pay attention to the kernel bit.
- */
- hvm_set_info_guest(v, compat ? 0 : c.nat->gs_base_kernel);
+ hvm_set_info_guest(v);
if ( is_hvm_vcpu(v) || v->is_initialised )
goto out;
return intr_info & INTR_INFO_VALID_MASK;
}
-static void vmx_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel)
+static void vmx_set_info_guest(struct vcpu *v)
{
unsigned long intr_shadow;
__vmwrite(GUEST_INTERRUPTIBILITY_INFO, intr_shadow);
}
- /* PVH 32bitfixme */
- if ( is_pvh_vcpu(v) )
- __vmwrite(GUEST_GS_BASE, gs_base_kernel);
-
vmx_vmcs_exit(v);
}
int (*msr_write_intercept)(unsigned int msr, uint64_t msr_content);
void (*invlpg_intercept)(unsigned long vaddr);
void (*handle_cd)(struct vcpu *v, unsigned long value);
- void (*set_info_guest)(struct vcpu *v, uint64_t gs_base_kernel);
+ void (*set_info_guest)(struct vcpu *v);
void (*set_rdtsc_exiting)(struct vcpu *v, bool_t);
/* Nested HVM */
void *hvm_map_guest_frame_ro(unsigned long gfn, bool_t permanent);
void hvm_unmap_guest_frame(void *p, bool_t permanent);
-static inline void hvm_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel)
+static inline void hvm_set_info_guest(struct vcpu *v)
{
if ( hvm_funcs.set_info_guest )
- return hvm_funcs.set_info_guest(v, gs_base_kernel);
+ return hvm_funcs.set_info_guest(v);
}
int hvm_debug_op(struct vcpu *v, int32_t op);
* - For HVM guests, the structures read include: fpu_ctxt (if
* VGCT_I387_VALID is set), flags, user_regs, debugreg[*]
*
- * - PVH guests are the same as HVM guests, but additionally set cr3,
- * and for 64-bit guests, gs_base_kernel. Additionally, the following
- * entries must be 0: ctrlreg[1], ldt_base, ldt_ents, user_regs.{cs,
- * ss, es, ds, fs, gs), gdt_ents, fs_base, and gs_base_user.
+ * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to
+ * set cr3. All other fields not used should be set to 0.
*/
struct vcpu_guest_context {
/* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */