nested vmx: use literal name instead of hard numbers

For those default 1 settings in VMX MSR, use some literal name
instead of hard numbers in the code.

Besides, fix the default 1 setting for pin based control MSR.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Committed-by: Keir Fraser <keir@xen.org>

diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index 719bfce0eff52130bb7b19bbfcdefd140c15f734..eb10bbfb68dccd8f5ca4a3d9a7ba3d33b160a283 100644 (file)
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -1299,7 +1299,7 @@ int nvmx_handle_vmwrite(struct cpu_user_regs *regs)
  */
 int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
 {
-    u64 data = 0, tmp;
+    u64 data = 0, tmp = 0;
     int r = 1;
 
     if ( !nestedhvm_enabled(current->domain) )
@@ -1318,9 +1318,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
         data = PIN_BASED_EXT_INTR_MASK |
                PIN_BASED_NMI_EXITING |
                PIN_BASED_PREEMPT_TIMER;
-        data <<= 32;
-       /* 0-settings */
-        data |= 0;
+        tmp = VMX_PINBASED_CTLS_DEFAULT1;
+        data = ((data | tmp) << 32) | (tmp);
         break;
     case MSR_IA32_VMX_PROCBASED_CTLS:
         /* 1-seetings */
@@ -1342,8 +1341,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
                CPU_BASED_VIRTUAL_NMI_PENDING |
                CPU_BASED_ACTIVATE_MSR_BITMAP |
                CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
-        /* bit 1, 4-6,8,13-16,26 must be 1 (refer G4 of SDM) */
-        tmp = ( (1<<26) | (0xf << 13) | 0x100 | (0x7 << 4) | 0x2);
+        tmp = VMX_PROCBASED_CTLS_DEFAULT1;
         /* 0-settings */
         data = ((data | tmp) << 32) | (tmp);
         break;
@@ -1356,8 +1354,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
         break;
     case MSR_IA32_VMX_EXIT_CTLS:
         /* 1-seetings */
-        /* bit 0-8, 10,11,13,14,16,17 must be 1 (refer G4 of SDM) */
-        tmp = 0x36dff;
+        tmp = VMX_EXIT_CTLS_DEFAULT1;
         data = VM_EXIT_ACK_INTR_ON_EXIT |
                VM_EXIT_IA32E_MODE |
                VM_EXIT_SAVE_PREEMPT_TIMER |
@@ -1370,8 +1367,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
         data = ((data | tmp) << 32) | tmp;
         break;
     case MSR_IA32_VMX_ENTRY_CTLS:
-        /* bit 0-8, and 12 must be 1 (refer G5 of SDM) */
-        tmp = 0x11ff;
+        /* 1-seetings */
+        tmp = VMX_ENTRY_CTLS_DEFAULT1;
         data = VM_ENTRY_LOAD_GUEST_PAT |
                VM_ENTRY_LOAD_GUEST_EFER |
                VM_ENTRY_LOAD_PERF_GLOBAL_CTRL;

diff --git a/xen/include/asm-x86/hvm/vmx/vvmx.h b/xen/include/asm-x86/hvm/vmx/vvmx.h
index 067fbe413e2c41544674af8ce95b715aa78f3a87..dce2cd82f00da07ecaab6a315c22c82305b99d60 100644 (file)
--- a/xen/include/asm-x86/hvm/vmx/vvmx.h
+++ b/xen/include/asm-x86/hvm/vmx/vvmx.h
@@ -36,6 +36,15 @@ struct nestedvmx {
 
 #define vcpu_2_nvmx(v) (vcpu_nestedhvm(v).u.nvmx)
 
+/* bit 1, 2, 4 must be 1 */
+#define VMX_PINBASED_CTLS_DEFAULT1     0x16
+/* bit 1, 4-6,8,13-16,26 must be 1 */
+#define VMX_PROCBASED_CTLS_DEFAULT1    0x401e172
+/* bit 0-8, 10,11,13,14,16,17 must be 1 */
+#define VMX_EXIT_CTLS_DEFAULT1         0x36dff
+/* bit 0-8, and 12 must be 1 */
+#define VMX_ENTRY_CTLS_DEFAULT1                0x11ff
+
 /*
  * Encode of VMX instructions base on Table 24-11 & 24-12 of SDM 3B
  */