x86/pv: Expose RDTSCP to PV guests

The final remnanat of PVRDTSCP is that we would emulate RDTSCP even on
hardware which lacked the instruction.  RDTSCP is available on almost all
64-bit x86 hardware.

Remove this emulation, drop the TSC_MODE_PVRDTSCP constant, and allow RDTSCP
in a PV guest's CPUID policy.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c
index 56f5a45b6815bd5732857e376f8d3f858f30fd76..91d05790c2fc62551cdbe8a61a14b98783daedf5 100644 (file)
--- a/xen/arch/x86/pv/emul-inv-op.c
+++ b/xen/arch/x86/pv/emul-inv-op.c
@@ -41,31 +41,6 @@
 
 #include "emulate.h"
 
-static int emulate_invalid_rdtscp(struct cpu_user_regs *regs)
-{
-    char opcode[3];
-    unsigned long eip, rc;
-    struct vcpu *v = current;
-    const struct domain *currd = v->domain;
-
-    eip = regs->rip;
-    if ( (rc = copy_from_user(opcode, (char *)eip, sizeof(opcode))) != 0 )
-    {
-        pv_inject_page_fault(0, eip + sizeof(opcode) - rc);
-        return EXCRET_fault_fixed;
-    }
-    if ( memcmp(opcode, "\xf\x1\xf9", sizeof(opcode)) )
-        return 0;
-    eip += sizeof(opcode);
-
-    msr_split(regs, pv_soft_rdtsc(v, regs));
-    regs->rcx = (currd->arch.tsc_mode == TSC_MODE_PVRDTSCP
-                 ? currd->arch.incarnation : 0);
-
-    pv_emul_instruction_done(regs, eip);
-    return EXCRET_fault_fixed;
-}
-
 static int emulate_forced_invalid_op(struct cpu_user_regs *regs)
 {
     char sig[5], instr[2];
@@ -121,7 +96,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs)
 
 bool pv_emulate_invalid_op(struct cpu_user_regs *regs)
 {
-    return !emulate_invalid_rdtscp(regs) && !emulate_forced_invalid_op(regs);
+    return !emulate_forced_invalid_op(regs);
 }
 
 /*

diff --git a/xen/include/asm-x86/time.h b/xen/include/asm-x86/time.h
index 4f3d926884bb821774e5d7dd5ffb82e9b1f343c7..f347311cc4292a4af4aa1d978c75c58ac329efc2 100644 (file)
--- a/xen/include/asm-x86/time.h
+++ b/xen/include/asm-x86/time.h
@@ -17,7 +17,6 @@
 #define TSC_MODE_DEFAULT          0
 #define TSC_MODE_ALWAYS_EMULATE   1
 #define TSC_MODE_NEVER_EMULATE    2
-#define TSC_MODE_PVRDTSCP         3
 
 typedef u64 cycles_t;
 

diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 6c82816fd3545d3b95408816f5884ce0314d844e..fbc68fa29f3b0d729ae4f624d8faf285f40c8231 100644 (file)
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -156,7 +156,7 @@ XEN_CPUFEATURE(NX,            2*32+20) /*A  Execute Disable */
 XEN_CPUFEATURE(MMXEXT,        2*32+22) /*A  AMD MMX extensions */
 XEN_CPUFEATURE(FFXSR,         2*32+25) /*A  FFXSR instruction optimizations */
 XEN_CPUFEATURE(PAGE1GB,       2*32+26) /*H  1Gb large page support */
-XEN_CPUFEATURE(RDTSCP,        2*32+27) /*S  RDTSCP */
+XEN_CPUFEATURE(RDTSCP,        2*32+27) /*A  RDTSCP */
 XEN_CPUFEATURE(LM,            2*32+29) /*A  Long Mode (x86-64) */
 XEN_CPUFEATURE(3DNOWEXT,      2*32+30) /*A  AMD 3DNow! extensions */
 XEN_CPUFEATURE(3DNOW,         2*32+31) /*A  3DNow! */