/* A write to obtain the length must happen as a 32-bit write.
* This does not (yet) support writing individual bytes
*/
- if (value == ~PCI_ROM_ADDRESS_ENABLE)
- bar->which = 1;
- else {
- u32 tmpval;
- pci_read_config_dword(dev, offset, &tmpval);
- if (tmpval != bar->val && value == bar->val) {
- /* Allow restoration of bar value. */
- pci_write_config_dword(dev, offset, bar->val);
- }
- bar->which = 0;
- }
+ bar->which = (value == ~PCI_ROM_ADDRESS_ENABLE);
/* Do we need to support enabling/disabling the rom address here? */
/* A write to obtain the length must happen as a 32-bit write.
* This does not (yet) support writing individual bytes
*/
- if (value == ~0)
- bar->which = 1;
- else {
- u32 tmpval;
- pci_read_config_dword(dev, offset, &tmpval);
- if (tmpval != bar->val && value == bar->val) {
- /* Allow restoration of bar value. */
- pci_write_config_dword(dev, offset, bar->val);
- }
- bar->which = 0;
- }
+ bar->which = (value == ~0);
return 0;
}
static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data)
{
struct pci_bar_info *bar = data;
+ int idx = (offset - 0x10) >> 2;
+
+ if (idx > PCI_STD_RESOURCE_END )
+ idx = PCI_ROM_RESOURCE;
if (unlikely(!bar)) {
printk(KERN_WARNING "pciback: driver data not found for %s\n",
return XEN_PCI_ERR_op_failed;
}
- *value = bar->which ? bar->len_val : bar->val;
+ *value = bar->which ? ~(pci_resource_len(dev, idx)-1) : pci_resource_start(dev, idx);
+ *value |= pci_resource_flags(dev, idx) & 0xf;
return 0;
}
return 0;
}
+static int vendor_read(struct pci_dev *dev, int offset, u16 * value,
+ void *data)
+{
+ *value = dev->vendor;
+
+ return 0;
+}
+
+static int device_read(struct pci_dev *dev, int offset, u16 * value,
+ void *data)
+{
+ *value = dev->device;
+
+ return 0;
+}
+
static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data)
{
u8 cur_value;
}
static const struct config_field header_common[] = {
+ {
+ .offset = PCI_VENDOR_ID,
+ .size = 2,
+ .u.w.read = vendor_read
+ },
+ {
+ .offset = PCI_DEVICE_ID,
+ .size = 2,
+ .u.w.read = device_read
+ },
{
.offset = PCI_COMMAND,
.size = 2,