x86: s3: ensure CR4.MCE is enabled after mcheck_init()

Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is
enabled before mcheck_init() -- thought looks I don't meet with an
actual issue with this, we'd better fix it.

Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>

diff --git a/xen/arch/x86/acpi/power.c b/xen/arch/x86/acpi/power.c
index dfe35468aca257499d653718514b72ea7a96c503..e6847b3e4f3afaf6a8c3589e9e833b332e4a60cd 100644 (file)
--- a/xen/arch/x86/acpi/power.c
+++ b/xen/arch/x86/acpi/power.c
@@ -147,6 +147,7 @@ static int enter_state(u32 state)
 {
     unsigned long flags;
     int error;
+    unsigned long cr4;
 
     if ( (state <= ACPI_STATE_S0) || (state > ACPI_S_STATES_MAX) )
         return -EINVAL;
@@ -201,13 +202,15 @@ static int enter_state(u32 state)
     }
 
     /* Restore CR4 and EFER from cached values. */
-    write_cr4(read_cr4());
+    cr4 = read_cr4();
+    write_cr4(cr4 & ~X86_CR4_MCE);
     if ( cpu_has_efer )
         write_efer(read_efer());
 
     device_power_up();
 
     mcheck_init(&boot_cpu_data);
+    write_cr4(cr4);
 
     printk(XENLOG_INFO "Finishing wakeup from ACPI S%d state.\n", state);