Handle invalid accesses as SIGILL for mips/mipsel userland emulation.

diff --git a/linux-user/main.c b/linux-user/main.c
index 6dd08022f0a8ba6d0e371c3d896ec1c286a25620..c423d299b55a913d18bbc658a7478c48d009f2fd 100644 (file)
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -1352,6 +1352,8 @@ void cpu_loop(CPUMIPSState *env)
                 }
             }
             break;
+        case EXCP_TLBL:
+        case EXCP_TLBS:
         case EXCP_CpU:
         case EXCP_RI:
             info.si_signo = TARGET_SIGILL;

diff --git a/target-mips/helper.c b/target-mips/helper.c
index a222d6b0ec5fd490fe21717669c6eb5bce0e78dc..a0a56d8f0468c4b5bc5f63e66a76232e79b59387 100644 (file)
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -243,6 +243,12 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
     return ret;
 }
 
+#if defined(CONFIG_USER_ONLY)
+void do_interrupt (CPUState *env)
+{
+    env->exception_index = EXCP_NONE;
+}
+#else
 void do_interrupt (CPUState *env)
 {
     target_ulong offset;
@@ -409,3 +415,4 @@ void do_interrupt (CPUState *env)
     }
     env->exception_index = EXCP_NONE;
 }
+#endif /* !defined(CONFIG_USER_ONLY) */

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 74fa1141607d426d3be7773255d2c30a53bcf6cc..64f7d75650a6faeceb8e17d4434d3291e6d32dd9 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -4072,6 +4072,7 @@ void cpu_reset (CPUMIPSState *env)
     tlb_flush(env, 1);
 
     /* Minimal init */
+#if !defined(CONFIG_USER_ONLY)
     if (env->hflags & MIPS_HFLAG_BMASK) {
         /* If the exception was raised from a delay slot,
          * come back to the jump.  */
@@ -4098,9 +4099,11 @@ void cpu_reset (CPUMIPSState *env)
     /* Count register increments in debug mode, EJTAG version 1 */
     env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER);
     env->CP0_PRid = MIPS_CPU;
+#endif
     env->exception_index = EXCP_NONE;
 #if defined(CONFIG_USER_ONLY)
     env->hflags |= MIPS_HFLAG_UM;
+    env->user_mode_only = 1;
 #endif
 #ifdef MIPS_USES_FPU
     env->fcr0 = MIPS_FCR0;