]> xenbits.xensource.com Git - qemu-upstream-4.6-testing.git/commitdiff
tcg: Change tcg_qemu_tb_exec return to uintptr_t
authorRichard Henderson <rth@twiddle.net>
Tue, 20 Aug 2013 21:35:34 +0000 (14:35 -0700)
committerRichard Henderson <rth@twiddle.net>
Mon, 2 Sep 2013 16:08:29 +0000 (09:08 -0700)
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
cpu-exec.c
tcg/ppc/tcg-target.h
tcg/tcg.h
tcg/tci/tcg-target.h
tci.c

index 301be28bf74015ee24d9c1d923d89e561b3112a1..14af2edab6318d5614b7ad9ae408dc5b3c034fba 100644 (file)
@@ -53,7 +53,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc)
 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
 {
     CPUArchState *env = cpu->env_ptr;
-    tcg_target_ulong next_tb = tcg_qemu_tb_exec(env, tb_ptr);
+    uintptr_t next_tb = tcg_qemu_tb_exec(env, tb_ptr);
     if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
         /* We didn't start executing this TB (eg because the instruction
          * counter hit zero); we must restore the guest PC to the address
index 613c5ff4fcd95f6e9b726b09d892d9d3917dc518..c9f8ff5206cc344342a98f437826f5df92f34b28 100644 (file)
@@ -102,7 +102,7 @@ typedef enum {
 #define TCG_AREG0 TCG_REG_R27
 
 #define tcg_qemu_tb_exec(env, tb_ptr) \
-    ((long __attribute__ ((longcall)) \
+    ((uintptr_t __attribute__ ((longcall)) \
       (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 
 #endif
index 3f869dd9b0aaa7fcf03932ef6ca4997312bd43b9..2fce485abc3a27cb7e6d9be5e36e4d75937fe1dd 100644 (file)
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -733,8 +733,7 @@ TCGv_i64 tcg_const_local_i64(int64_t val);
 
 #if !defined(tcg_qemu_tb_exec)
 # define tcg_qemu_tb_exec(env, tb_ptr) \
-    ((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \
-                                                                      tb_ptr)
+    ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 #endif
 
 void tcg_register_jit(void *buf, size_t buf_size);
index e284972d92fac1527698b680f070d11c864024b2..02e0da1304d4242652f6fa36ee5d23fc623a576d 100644 (file)
@@ -169,7 +169,7 @@ typedef enum {
 
 void tci_disas(uint8_t opc);
 
-tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
+uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
 #define tcg_qemu_tb_exec tcg_qemu_tb_exec
 
 static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
diff --git a/tci.c b/tci.c
index c742c8df5cbbef96f77d6c7b9ccbd2ccf99a912a..18c888e54dd8a367d647a0c2f76f52d46d25509b 100644 (file)
--- a/tci.c
+++ b/tci.c
@@ -434,11 +434,11 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition)
 }
 
 /* Interpret pseudo code in tb. */
-tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
+uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
 {
     long tcg_temps[CPU_TEMP_BUF_NLONGS];
     uintptr_t sp_value = (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS);
-    tcg_target_ulong next_tb = 0;
+    uintptr_t next_tb = 0;
 
     tci_reg[TCG_AREG0] = (tcg_target_ulong)env;
     tci_reg[TCG_REG_CALL_STACK] = sp_value;