BIOS might pass control to Xen leaving QI and/or IR in enabled and/or
partially configured state. In case of x2APIC code path where EIM is
enabled early in boot - those are correctly disabled by Xen before any
attempt to configure. But for xAPIC that step is missing which was
proven to cause QI initialization failures on some ICX based platforms
where QI is left pre-enabled and partially configured by BIOS. That
problem becomes hard to avoid since those platforms are shipped with
x2APIC opt out being advertised by default at the same time by firmware.
Unify the behaviour between x2APIC and xAPIC code paths keeping that in
line with what Linux does.
Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Release-Acked-by: Ian Jackson <iwj@xenproject.org>
static bool __initdata tdt_enable = true;
boolean_param("tdt", tdt_enable);
-static bool __read_mostly iommu_x2apic_enabled;
+bool __read_mostly iommu_x2apic_enabled;
static struct {
int active;
u32 sts;
/*
- * Basic VT-d HW init: set VT-d interrupt, clear VT-d faults.
+ * Basic VT-d HW init: set VT-d interrupt, clear VT-d faults, etc.
*/
for_each_drhd_unit ( drhd )
{
clear_fault_bits(iommu);
+ /*
+ * Disable interrupt remapping and queued invalidation if
+ * already enabled by BIOS in case we've not initialized it yet.
+ */
+ if ( !iommu_x2apic_enabled )
+ {
+ disable_intremap(iommu);
+ disable_qinval(iommu);
+ }
+
spin_lock_irqsave(&iommu->register_lock, flags);
sts = dmar_readl(iommu->reg, DMAR_FECTL_REG);
sts &= ~DMA_FECTL_IM;
APIC_MODE_X2APIC /* x2APIC mode - common for large MP machines */
};
+extern bool iommu_x2apic_enabled;
extern u8 apic_verbosity;
extern bool directed_eoi_enabled;