x86/msr: Virtualise MSR_SPEC_CTRL.SSBD for guests to use

Almost all infrastructure is already in place.  Update the reserved bits
calculation in guest_wrmsr(), and offer SSBD to guests by default.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: cd53023df952cf0084be9ee3d15a90f8837049c2
master date: 2018-05-21 14:20:06 +0100

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 90fe100316dd929622cc537521e8e9913d7b573c..0357d6252a7dc982ad1b90ce42b1774f9ea905e7 100644 (file)
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1136,7 +1136,8 @@ long arch_do_domctl(
                      * ignored) when STIBP isn't enumerated in hardware.
                      */
 
-                    if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+                    if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                                       (boot_cpu_has(X86_FEATURE_SSBD) ? SPEC_CTRL_SSBD : 0)) )
                         break;
                     v->arch.spec_ctrl = msr.value;
                     continue;

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 11839f3e80dcb5df436b8bbb95e86b1377b30149..873a3fe404f4570576e892d2b7bc461912a54630 100644 (file)
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -4998,7 +4998,9 @@ int hvm_msr_write_intercept(unsigned int msr, uint64_t msr_content,
          * when STIBP isn't enumerated in hardware.
          */
 
-        if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+        if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                             (edx & cpufeat_mask(X86_FEATURE_SSBD)
+                              ? SPEC_CTRL_SSBD : 0)) )
             goto gp_fault; /* Rsvd bit set? */
 
         v->arch.spec_ctrl = msr_content;

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index b759f9ef3b6c1405a3a8ec41d59837c4c8395359..f80e1f8b610070ea83be8129fd43fca19be60ed3 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2748,7 +2748,9 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
              * when STIBP isn't enumerated in hardware.
              */
 
-            if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+            if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                                 (edx & cpufeat_mask(X86_FEATURE_SSBD)
+                                  ? SPEC_CTRL_SSBD : 0)) )
                 goto fail; /* Rsvd bit set? */
 
             v->arch.spec_ctrl = eax;