They are trapped only with HCR_EL2.TID2 which we don't set, and in any
case we handled only for 32-bit.
One day we may want to trap and emulate these, but for now don't
bother with the dead code.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
switch ( hsr.bits & HSR_CP32_REGS_MASK )
{
- case HSR_CPREG32(CLIDR):
- if ( !cp32.read )
- {
- dprintk(XENLOG_ERR,
- "attempt to write to read-only register CLIDR\n");
- domain_crash_synchronous();
- }
- *r = READ_SYSREG32(CLIDR_EL1);
- break;
- case HSR_CPREG32(CCSIDR):
- if ( !cp32.read )
- {
- dprintk(XENLOG_ERR,
- "attempt to write to read-only register CCSIDR\n");
- domain_crash_synchronous();
- }
- *r = READ_SYSREG32(CCSIDR_EL1);
- break;
case HSR_CPREG32(DCCISW):
if ( cp32.read )
{