]> xenbits.xensource.com Git - people/pauldu/xen.git/commitdiff
xen: arm: do not handle traps accessing CLIDR_EL1 or CCSIDR_EL1
authorIan Campbell <ian.campbell@citrix.com>
Mon, 30 Mar 2015 11:12:27 +0000 (12:12 +0100)
committerIan Campbell <ian.campbell@citrix.com>
Tue, 31 Mar 2015 08:42:19 +0000 (09:42 +0100)
They are trapped only with HCR_EL2.TID2 which we don't set, and in any
case we handled only for 32-bit.

One day we may want to trap and emulate these, but for now don't
bother with the dead code.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
xen/arch/arm/traps.c

index e13b959b3e35f0e6c11c35787a961eced88a8d6b..22beab7e43c48f9f4f6caacf74713d1d161be326 100644 (file)
@@ -1564,24 +1564,6 @@ static void do_cp15_32(struct cpu_user_regs *regs,
 
     switch ( hsr.bits & HSR_CP32_REGS_MASK )
     {
-    case HSR_CPREG32(CLIDR):
-        if ( !cp32.read )
-        {
-            dprintk(XENLOG_ERR,
-                    "attempt to write to read-only register CLIDR\n");
-            domain_crash_synchronous();
-        }
-        *r = READ_SYSREG32(CLIDR_EL1);
-        break;
-    case HSR_CPREG32(CCSIDR):
-        if ( !cp32.read )
-        {
-            dprintk(XENLOG_ERR,
-                    "attempt to write to read-only register CCSIDR\n");
-            domain_crash_synchronous();
-        }
-        *r = READ_SYSREG32(CCSIDR_EL1);
-        break;
     case HSR_CPREG32(DCCISW):
         if ( cp32.read )
         {